TMS320F28388D: CLB logic implementation

Hi,

Not exactly, its a collection of blocks like LUT's, FSM's and Counter's which can be dynamically configured and interconnected as well, with an additional High Level Controller. 

Read through the following application note to understand more details.

https://www.ti.com/lit/an/spracl3/spracl3.pdf

Hi 

Karthikeyan,

yes ,  i understood that clb  have sub modules like FSM, LUT, COUNTER ,HLC.

my question was different .

my question more specifically as follows:    sub module like LUT(3 to 1), LUT(4 to 1), FSM, COUNTER all can be configured from sysconf window of CCS as given in CLB examples which  are provided for F28388 controller. suppose i have written boolean  equation in any above sub module,  how that 

KARTHIKEYAN 

continue.. 

how that boolean equation is implemented hardware wise .

hardware wise means each LUT consist of combination of SRAM and MUX  .

is it or not that i was wanted to know.

thanks 

KARTHIKEYAN 

I do not think we make the internal design details available for customers.

In fact, synconfig generates c headers with details on register configurations for different blocks and interconnections which gets taken and programmed on the respective registers by the application.

If you can give little more details on the exact concern or the background to your question, we can help address it.

Thanks Karthik,

means if we use  sysconfig tool for CLB , then here  no need to think for creating verlolg or vhdl file to make any glue logic.

is it?