This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/TMS320F280041C: CMPSS value

Part Number: TMS320F280041C


Tool/software: Code Composer Studio

Greetings! I`m looking at the 2 example for CMPSS. So  I`ve noticed in the init function it `s used the output X-Bar -

[code]

XBAR_setOutputMuxConfig(XBAR_OUTPUT3, XBAR_OUT_MUX00_CMPSS1_CTRIPOUTH);
XBAR_enableOutputMux(XBAR_OUTPUT3, XBAR_MUX00);

[/code]

I do not understand how should I read this value? Do I have to use the input X-bar to read the filter output? There is nothing in the examples...

Thanks!

  • The output XBAR is used in the context of CMPSS when you want to bring the CMPSS output signals out to a pin. You'll see code in the examples that says GPIO14 should be configured as OUTPUTXBAR3 (GPIO_setPinConfig(GPIO_14_OUTPUTXBAR3)), so you could look at GPIO14 on an oscilloscope and see CTRIPOUTH.

    If you're just trying to read it in the code, you can use the CMPSS_getStatus() function.

    Does that answer your question or did I misunderstand what you were asking?

    Whitney

  • Ok! I think I did it. I MUX the PGA to the first filter using this:

    [code]

    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_1, 4);

    [/code]

    So now the result of CMPSS_getStatus(CMPSS1_BASE); is 770(0xb0011 0000 0010) or 771(0xb0011 0000 0011) . I think the first bit of the result corresponds to the CTRIP1H. But why the second bit doesn`t chage? This should be the latched value. when does the latched value change?

    Thanks!

  • Thanks for your patience. Were you able to resolve this? I believe something needs to generate a LATCHCLR pulse--you can do it in software through the xLATCHCLR bits in COMPSTSCLR or have it generated from an EPWM module. You can read the "LATCHCLR, EPWMSYNCPER and EPWMBLANK Signals" section in the CMPSS chapter of the TRM for more information.

    Whitney