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CCS/TIEVM-VIENNARECT: three-phase Vienna:in the BUILD 2.Three phase current unbalance occurs when current loop is introduced

Part Number: TIEVM-VIENNARECT

Tool/software: Code Composer Studio

hi

When debugging the build2 mode of three-phase Vienna according to the steps in the design manual, after introducing the current loop, the three-phase current is basically balanced when the PWM trigger signal is not given.

However, once the PWM trigger signal is given, the three-phase current is unbalanced and gradually expanded to trigger the over-current protection.

As shown in the figure below, phase a (yellow line) and phase B (red line) are unbalanced, and phase C (green line) is normal.

What may be the cause of this? Did you have this problem when you debugged? How did you solve it at that time?

Looking forward to your reply

  • Hi,

    I have not seen this issue before. So you are saying when you closed the current in build 2, you started to see this issue. 

    I will not say this is an unbalanced current issue, instead, the current looks like distorted, so the PWM output must have some issue there.

    1. Could you please check everything is ok under build 1 including ADC and PWM? 

    2. Could you check the PWM output of the two phases that are distorted and try to dig into it?

    Regards,

    Chen