Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28388D: Debugging

Part Number: TMS320F28388D
Other Parts Discussed in Thread: TMDSCNCD28388D, C2000WARE

This query deals with debugging options for the 28388D chip.

It is understood that 28388D's C28 cores are compatible with each of the three families of debuggers: XDS100v2, XDS200 and 560v2. (All three are provided by Spectrum Digital and Blackhawk)

CM, which is an ARM-Cortex M4 core, has 2 separate debug ports: SWO and 5 pins Trace port.

1. Regarding the C28 cores: What would be the advantages, if any, of using each debugger family with 28388D? Specifically, would there be more tracing capabilities with the more advanced families?

2. Regarding CM: What are the pros/cons of working with any of the two debug ports? Does the trace port provide more tracing capabilities relative to SWO?

3. Which of the three families of debuggers above, if any, can work with both core types? and with which of the two debug ports in CM?

If none, does it mean that two debuggers are required: One for C28's cores and one for CM?

  • Hi,

    Debugging C28x as well CM  via JTAG interface (using CCS) is supported by all the three emulators. Trace feature for CM is supported via SWO interface and only XDS110 emulator. 

    Regards,

    Vivek Singh

  • Is there any advantage by connecting into CM's 5 pins trace port?

  • Can you please elaborate which interface you are referring and how are you planning to use that ? 

    Regards,

    Vivek Singh

  • The below CM schematics show two options for connectivity to CM debuggers: 5 pins trace port and SWO

    As per your answer: XDS110 connects to CM via SWO.

    (a) Are the any other debuggers in the market that can be connected to both the C28 cores and to the CM core in 28388 ?

    (b) Are any of them connect to CM via the trace port (and not via SWO)?

    (c) Does the 5 pin trace port interface provide any advantage over SWO in term of debug capability?

    Thanks

    Isaac

  •  

    Hi Vivek,

    My TI’s XDS110 is connected to TMDSCNCD28388D via J2 of the docking station:- With this connection, the 28388’s SWO is not connected to the XDS110.

    First question is regarding the recommended hardware connectivity: As XDS110 CTI-20 connector pin 7 is shared between SWO JTAG-TDO, What would be the recommended connection of XDS110 to 28388D, so that the debugger can utilize the advantages of SWO?

    Also, is there an example project where SWO connection would prove its advantage while debugging the CM, in compare to JTAG connectivity?

     

  • Hi Isaac,

    The SWO trace can be routed to a GPIO on the docking station so the SWO can be available while using JTAG. I am still in the process of getting information on the GPIO configuration that needs to be added to the application for routing SWO. As soon as I have this I will send it across along with the target-probe configuration.

    Regarding advantage, SWO can be used by application to stream messages and variable values using ITM to the host while target is running allowing user to get program flow or variable values at certain points in the application. We don't have any example project for this, but I can provide simple APIs for writing strings and variables via ITM. Let me know if this would help and I can send them across.

    Thanks,

    Ashwini

  • Hi Ashwini,

     

    Thanks for chasing up this issue as no documentation could be located.

    Indeed, the aim is to debug CM via SWO to allow better debug capabilities.

    Yes, it would be an advantage to get a code, hardware connectivity details and how to configure the target probe.

     

    Thanks,

    Isaac


  • Hi Issac,

    Here is the information.

    C28x Application configuration:

    The application running on C28x must configure the pin mux to route the serial wire data to a pin accessible to the XDS110. Here is the code snippet.

    // Export Serial Wire Data Over pin 25

    GPIO_setPinConfig(GPIO_25_TRACESWO);

    The GPIO 25 I believe gets routed to pin 77 on the Docking Station.

    Hardware connection:

    Connect the XDS110 Pod to the board. Connect the XDS110 Pod to the AUX adapter breakout board. Connect the UARTRX on the aux breakout board to pin 77 on the docking card as this is where the SWO is routed on the target. Connect the TGTVDDSENSE on Aux breakout board to 3.3V on docking card and GND to GND.

    Cortex M Sample ITM APIs:

    I have attached some example code on application configured ITM. To view the messages output by the application code you can open the COM port on the host machine that maps to the XDS110 Class Application/User UART at the baud rate configured by the application.

    /cfs-file/__key/communityserver-discussions-components-files/171/itm.c

    /cfs-file/__key/communityserver-discussions-components-files/171/itm.h

    /cfs-file/__key/communityserver-discussions-components-files/171/itm_5F00_private.h

    /cfs-file/__key/communityserver-discussions-components-files/171/test1.c

    Let me know if this has helped answer all your questions.

    Thanks,

    Ashwini

  • Hi Ashwini,

    Taking into account that pin7 of XDS110 is shared between TDO and SWO, I understand for your reply to Isaac that the solution you are proposing is:

    • Use primary debug interface for JTAG, i.e., use pin 7 of XDS110 for TDO. It can be used to debug both C28 cores, as well as ARM-Cortex M4 core.
    • Use auxiliary debug interface (breakout board) for ITM, wiring SWO from 28338 to UARTRX from breaking board (as well as TGTVDDSENSE to 3.3v)

    Then, the host machine can receive the ITM trace data through COM configurated.

    Please correct me if i am wrong.

    I have two more questions, please:

    • Are you planning to integrate in CCS/C2000ware the ITM libraries and a Window View in order to avoid custom implementations of ITM and neither using a external seriel terminal (putty, hyperterminal, etc.)?
    • Your proposal was using ITM through SWO instead of parallel trace mode (Tracedata[0:3]). I guess it is not possibe to use the parallel trace mode with the aux breakout board because there are not enough pins. Am I correct?

    Thanks in advance

  • Hi Miguel,

    Yes, your understanding is correct, routing of SWO to a GPIO and Aux breakout board allows for debugging with JTAG while using SWO Trace.

    Regarding the questions:

    1. There are no plans to integrate ITM libraries in C2000Ware as of now.

    2. Correct, parallel pin trace is not supported by the XDS110 probe.

    Thanks,

    Ashwini