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TMS320F28377D: how to do SCI boot for CPU2 on empty chip

Part Number: TMS320F28377D

Hi Team,

My customer want to use SCI boot to program both F2837xD CPU1 and CPU2 flash on empty chip without application code by using the same SCI boot pin, it is no problem to do SCI boot at CPU1 according to boot pin setting, but for CPU2 without boot pin selection, how to do SCI boot when there is no bootloader code in CPU2 flash?

From the below diagram, I did not see how to choose the SCI boot mode for CPU2, only in EMU boot that use EMUKEY value to decide whether can use SCI boot. which is register that can be configured by CPU1 to choose boot mode for CPU2?  it seems setting IPCBOOTMODE by CPU1 that can work, but I did not see more info about IPCBOOTMODE. what value in IPCBOOTMODE is corresponding to SCI boot for CPU2?

 

  • Strong,

    Please look for "OTP_BMODE" in TRM. i believe this should give you more details that you are looking for,

  • Hi Baskaran,

    Unfortunately I find little info of OTP_BMODE in TRM, customer would not modify OTP to boot from SCI, any method to change CPU2 boot mode by running CPU1 code at the startup?

    Also could you explain more details of IPCBOOTMODE? what value in IPCBOOTMODE is corresponding to SCI boot for CPU2?

    What customer want is that use SCI boot to program both F2837xD CPU1 and CPU2 flash on empty chip without application code, could you specific the details of how to implement? Thanks.

  • Hi Strong,

    SCI boot mode is not supported for CPU2 in standalone boot mode.Referring to Table 3-7. in TRM.

    You may need to receive the CPU2's application in CPU1 over SCI and transfer it to CPU2's RAM or IPC. Then configure the IPC boot configuration to boot from CPU2's RAM.

  • Hi Baskaran,

    Thanks for your support.
    And I have further question that need your help to clarify:

    1. in Table 3-4, the table do say that SCI boot is available for CPU2, if SCI boot mode is not supported for CPU2 in standalone boot mode, it will make confusion for the table.
    2. In TRM, it seems little info talk about register IPCBOOTMODE, could you explain more details of IPCBOOTMODE?
    3. If there is no code stored in CPU2, how to transfer customer’s bootloader code to CPU2's RAM or IPC?
    4. C2prog tool should be able to update CPU2 flash by SCI, could you share more details of how C2prog program an empty chip by SCI?

     

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