Part Number: TMS320F28388S
Tool/software: TI C/C++ Compiler
Hi expert,
My customer are using Align(16) for each section below: then it should force the linker to align that one section to a 16-byte aligned address.
but when take a look at the hex file generated, it did not work as below showed:
the line 215 seem it not 16 byte align.
Also the line 3680 is not 16 byte aligned.
attachment is the cmd file customer use, anything wrong for the result that hex file generated?
MEMORY
{
/* Flash sectors */
// CMBANK0_RESETISR : origin = 0x00200000, length = 0x00000008 /* Boot to Flash Entry Point */
CMBANK0_BOOTLOADER : origin = 0x00200008, length = 0x00003FF7 /* user Boot loader Entry Point */
CMBANK0_RESETISR : origin = 0x00204000, length = 0x00000008 /* Boot to Flash Entry Point */
// CMBANK0_APP : origin = 0x00204000, length = 0x0003BFF0 /* app Entry Point */
// CMBANK0_APP : origin = 0x00204008, length = 0x0003BFF0 /* app Entry Point */
CMBANK0_APP : origin = 0x00204008, length = 0x0003BFE8 /* app Entry Point */
CMBANK0_APP_META : origin = 0x0023FFF0, length = 0x00000010 /* app meta. Entry Point */
CMBANK0_BACKUP : origin = 0x00240000, length = 0x0003FFF0 /* backup Entry Point */
CMBANK0_BACKUP_META : origin = 0x0027FFF0, length = 0x00000010 /* backup meat. Entry Point */
C1RAM : origin = 0x1FFFC000, length = 0x00000FFF
C0RAM : origin = 0x1FFFD000, length = 0x00002FFF
BOOT_RSVD : origin = 0x20000000, length = 0x00000800 /* Part of S0, BOOT rom will use this for stack */
S0RAM : origin = 0x20000800, length = 0x000037FF
// S1RAM : origin = 0x20004000, length = 0x00003FFF
// S2RAM : origin = 0x20008000, length = 0x00003FFF
// S3RAM : origin = 0x2000C000, length = 0x00003FFF
S1_2_3RAM : origin = 0x20004000, length = 0x0000BFFF
E0RAM : origin = 0x20010000, length = 0x00003FFF
CPU1TOCMMSGRAM0 : origin = 0x20080000, length = 0x00000C00
CPU1TOCMMSGRAM0_RT : origin = 0x20080C00, length = 0x00000200
CPU1TOCMMSGRAM1 : origin = 0x20080E00, length = 0x00000200
CMTOCPU1MSGRAM0 : origin = 0x20082000, length = 0x00000C00
CMTOCPU1MSGRAM0_RT : origin = 0x20082C00, length = 0x00000200
CMTOCPU1MSGRAM1 : origin = 0x20082E00, length = 0x00000200
}
SECTIONS
{
.resetisr : > CMBANK0_RESETISR,ALIGN(16)
.vftable : > CMBANK0_APP ,ALIGN(16) /* Application placed vector table in Flash*/
.vtable : > S0RAM /* Application placed vector table in RAM*/
.text : > CMBANK0_APP,ALIGN(16)
.cinit : > CMBANK0_APP,ALIGN(16)
.pinit : > CMBANK0_APP,ALIGN(16)
.switch : > CMBANK0_APP,ALIGN(16)
.sysmem : > E0RAM
.stack : > C1RAM
.ebss : > C1RAM
.econst : > CMBANK0_APP,ALIGN(16)
.esysmem : > C1RAM
.data : > S1_2_3RAM
.bss : > C0RAM
.const : > CMBANK0_APP,ALIGN(16)
MSGRAM_CM_TO_CPU1_RT : > CMTOCPU1MSGRAM0_RT , type=NOINIT //must noinit type?why?
MSGRAM_CM_TO_CPU1_NRT : > CMTOCPU1MSGRAM0 , type=NOINIT
MSGRAM_CM_TO_CPU1 : > CMTOCPU1MSGRAM1 , type=NOINIT
MSGRAM_CPU1_TO_CM_RT : > CPU1TOCMMSGRAM0_RT , type=NOINIT
MSGRAM_CPU1_TO_CM_NRT : > CPU1TOCMMSGRAM0 , type=NOINIT
MSGRAM_CPU1_TO_CM : > CPU1TOCMMSGRAM1 , type=NOINIT
Identification_Section : > CMBANK0_APP_META
.TI.ramfunc : {} LOAD = CMBANK0_APP,
RUN = S0RAM,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(16)
}








