Hi Team,
My customer traced back an issue in their system to the ADC offset calibration of their TMS320F28062:
"According to a few days of investigation this can be tracked down to the offset calibration of the ADC – both from the factory and obtained through re-calibration function AdcOffsetSelfCal().
Specifically, on a unit with poor offset the value stored in ADCOFFTRIM was 17 whereas a unit with good offset the value was 1.
I changed the offset routine to use an ADC pin with a known 3.0V Precision Reference and it seems to greatly reduce the variance in two “identical” units.
Is there a problem calibrating offset using VREFLO and pin B5 as in the examples in the technical manual?"
I would not expect this to be an issue with the methodology (VREFLO to pin B5) and suspect ground noise, but they have not verified this yet. Any ideas on what else could be causing this?:
"I have not checked if our ground is noisy or not but we achieve high offset even when being supplied clean benchtop 3.3V and no inverting switching going on.
We do notice variation in the 3.3V regulator we use to power our micro. We are using the internal VREG of the TI so we choose to feed 3.3V into VDDA, VDD3VFL, VDDIO, and VDD pins.
Additionally, we are using the internal 3.3V reference for the ADC.
If our external 3.3V regulator used to power the chip has variation between boards, will this change the internal 3.3V reference supplied to the ADC? Maybe this is what is causing the difference in offsets?"
Thanks,
Antonio