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TMS320F280025: Where to ack in nesting ISRs

Wayne Huang
Genius 17215 points

Part Number: TMS320F280025
Other Parts Discussed in Thread: C2000WARE

Dear Champs,

I am asking this for our customer.

In the nesting ISRs example,

C:\TI\c2000\C2000Ware_3_02_00_00\driverlib\f28002x\examples\interrupt\interrupt_ex2_sw_prioritization.c

Questions:

1. In "__interrupt void cpuTimer0ISR(void)", why is there no ack like "Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);"?

2. The user wants to clear ADCINT flag and ack in ADCC1ISR like below

AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
if(AdccRegs.ADCINTOVF.bit.ADCINT1 == 1) //ADCINT overflow
{
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 again
}
//
// Acknowledge the interrupt
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

Should the user put the above codes in between EINT and DINT or in the last of the ISR (i.e., after HWREGH(PIECTRL_BASE + PIE_O_IER1) = tempPIEIER;) of below codes?

__interrupt void adcC1ISR(void)
{

//
// Save IER register on stack
//
volatile uint16_t tempPIEIER = HWREGH(PIECTRL_BASE + PIE_O_IER1);

//
// Set the global and group priority to allow CPU interrupts
// with higher priority
//
IER |= M_INT1;
IER &= MINT1;
HWREGH(PIECTRL_BASE + PIE_O_IER1) &= MG1_3;

//
// Enable Interrupts
//
Interrupt_clearACKGroup(0xFFFFU);
__asm(" NOP");
EINT;

//
// Insert ISR code here
//

//
// Disable interrupts and restore registers saved:
//
DINT;
HWREGH(PIECTRL_BASE + PIE_O_IER1) = tempPIEIER;

}

Wayne Huang

  • 0
    TI__Genius 10845 points

    Hi Wayne,

    In "__interrupt void cpuTimer0ISR(void)", why is there no ack like "Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);"?

    The user need not explicitly ack the group as all the groups are acknowledged in the ISR before enabling the interrupts in the below statement.

    //
    // Enable Interrupts
    //
    Interrupt_clearACKGroup(0xFFFFU);
    __asm(" NOP");
    EINT;

    Thanks

    Vasudha

  • 0
    TI__Genius 10845 points

    Hi Wayne,

    2. The user wants to clear ADCINT flag and ack in ADCC1ISR like below

    AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
    if(AdccRegs.ADCINTOVF.bit.ADCINT1 == 1) //ADCINT overflow
    {
    AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 again
    }

    Wayne Huang said:
    Should the user put the above codes in between EINT and DINT or in the last of the ISR (i.e., after HWREGH(PIECTRL_BASE + PIE_O_IER1) = tempPIEIER;) of below codes?

    Yes, the above ADC flag and clear registgers relatedcode should be in between EINT and DINT as part of ISR code.

    Thanks

    Vasudha

  • 0 in reply to Vasudha Bhadoria
    TI__Genius 17215 points

    Dear Vasudha,

    1)

    That means the user does not need to ack (PIEACK) in any nesting ISR.

    Is it right?

    2) But the user still needs to clear the interrupt flag in between EINT and DINT

    like below for adcC1ISR

    AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
    if(AdccRegs.ADCINTOVF.bit.ADCINT1 == 1) //ADCINT overflow
    {
    AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 again
    }

    Is it right?

    Wayne Huang

  • 0 in reply to Wayne Huang
    TI__Genius 10845 points

    Hi Wayne,

    PFB the response:

    1) Yes, since all the interrupts are already acked at PIE level as part of enabling all the interrupts in the ISR.

    2) Yes, the interupt at peripheral level still needs to be cleared as part of user specific ISR code.

    Thanks

    Vasudha