TMS320F28388D: ADC Reading noise when not grounded

Hi Mohan,

You should treat the results of undriven ADC channels as undefined.  20% fluctuation is therefore acceptable, as would any conversion results between 0 and 4095 in any sequence (in 12-bit mode).    

When driving the ADC in normal operation, it is necessary to make sure the capacitance (Ch) of the S+H circuit is adequately charged to within 1/2 LSBs (or another acceptable level or error tolerance) of the applied source voltage.  This needs to consider the internal ADC model (usually Ch and a switch resistance, Ron) as well as the impedance of the external driver (usually at least an external C, Cs, and an external resistance, Rs).  In the worst-case analysis, it is best to assume that Ch starts from 0V and is being driven to VREFHI or Ch starts at VREFHI and is being driven to 0V. 

However, depending on the specific ADC implementation, Ch will usually start at a voltage near the previous conversion instead of at 0V or VREFHI because the ADC is using the same S+H circuit (and thus the same Ch) for sequential conversions.  In the case of a normal ADC channel that is driven by a source, but where the source impedance is too high and/or the S+H duration is too short, Ch doesn't get completely driven to the new voltage and the result is that the previous conversion has some influence on the current conversion, resulting in a "memory cross-talk" error.  When the current channel is undriven, the memory cross-talk effect becomes very pronounced.  Other architectural quirks may also influence the conversion result when the input is completely un-driven, so you shouldn't try to rely on this memory property.