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TMS320F28388D: RAM access scheme? SDRAM performances?

Part Number: TMS320F28388D

Team,

About RAM:
-Are all cores (2x C28x, 1x CM3) able to access (R+W) all internal RAM location?
-What is the advised SW mechanism to share internal RAM between all cores?

About SDRAM:
-Do we have performance benchmarks for SDRAM on F2838xx?
-The App note "Design and Usage Guidelines for the C2000 EMIF - SPRAC96A" mentions that SDRAM burst access are not supported for F2837xx. What about on F2838x?

Thanks in advance,

Anthony

  • Hi,

    -Are all cores (2x C28x, 1x CM3) able to access (R+W) all internal RAM location?

    Yes. There are dedicated RAMs which are only accessible from each code and some are shared RAM which can be accessed from core as well as associated DMA. Please refer Memory Controller section in device TRM for more detail.

    -What is the advised SW mechanism to share internal RAM between all cores?

    We have shared RAM which can be accessed from both C28x core (CPU1 and CPU2) but not CM. Between CM and each of C28x core, we have IPC RAMs which can be used.

    -Do we have performance benchmarks for SDRAM on F2838xx?


    The app note SPRAC96 is applicable for this device as well. 

     -The App note "Design and Usage Guidelines for the C2000 EMIF - SPRAC96A" mentions that SDRAM burst access are not supported for F2837xx. What about on F2838x?

    It is same on F2838x device.

    Regards,

    Vivek  Singh