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TMS320F28388D: Signal integrity information for TMS320F28388D

Part Number: TMS320F28388D

Hi,

We are using a bunch of TI parts and I have installed TINA to simulate them. I was wondering if the TMS320F28388D ibis model could be converted to a spice model usable by TINA just to get a general feel. SI simulation tools are not in the budget. Or are there any white papers showing signal integrity results for the device that I could use as a guideline? 

  • Jennifer,

    I have to consult with an IBIS expert on this, should be getting back to you by end of this week

    Regards,

    PEter

  • Jennifer,

    I am still waiting for response from our design team, I will get back to you on Monday or Tuesday.

    REgards,

    PEter

  • Jennifer,

    I didn't get a response today, should be getting back to you tomorrow.


    REgards,
    PEter

  • Jennifer,

    Here is the response I got on this topic:

    We do not provide SPICE models for this device.  SPICE models typically provide proprietary detail about the device, and we do not provide these to customers publicly.

     As you may have seen, we do provide industry-standard IBIS models as a way for customers to simulate & comprehend signal integrity.  In addition, please do take a look at the electrical characteristics section of the datasheet for some information on this device’s IO buffers (output impedance, etc).

     I realize this probably doesn’t leave you with a great solution based on your initial post, but if you have any additional specific questions, feel free to post them on the forum.

    Regards,
    Peter

    Regards,
    Peter

  • If you could find your way to releasing just the typical model for a GPIO pin that would be greatly appreciated or even suggest a simplified spice circuit that might approximate the pins. 

    If models or modeling guidance can not  be provided then I am looking for a recommendation on the Ethernet and Ethercat interface. Assuming I am using the TI PHY that is on the controlCard DP83822IRHBR. At what length would you recommend adding series termination to the RX and/or TX interfaces for these devices? What value should the series termination be to me the absolute maximum and minimum overshoot conditions for the devices. 

    Thank you for your response,

    Jennifer

  • Jennifer,

    I need to consult our design team on this, should be getting back to you in 2-3 days

    Regards,

    PEter

  • Jennifer,

    I don't have an answer for you yet, hopefully I will have something next Monday or Tuesday.

    Regards,
    PEter

  • Jennifer,

    Here is our response to your latest question:

    If you could find your way to releasing just the typical model for a GPIO pin that would be greatly appreciated or even suggest a simplified spice circuit that might approximate the pins.

    >> I do not think, we have such option.

    If models or modeling guidance can not  be provided then I am looking for a recommendation on the Ethernet and Ethercat interface. Assuming I am using the TI PHY that is on the controlCard DP83822IRHBR. At what length would you recommend adding series termination to the RX and/or TX interfaces for these devices? What value should the series termination be to me the absolute maximum and minimum overshoot conditions for the devices. 

    >> 50ohms series resistance is already embedded in Die and you are expected to not to cross overshoot, undershoots and also with in LVTTL noise margin limits as long as your board models are close to Zo=50ohms, 2.5 inches lossless transmission line.

    I will close this post now, please feel free to re-open it if something new comes up.

    Regards,
    Peter