TMS320F28035: PWM Channel AQCTLA Compare priority

Part Number: TMS320F28035

Hi,

I am curios about the priority order for the bits in the AQCTLA control register.

I was looking at two conditions:  (with PWM counter mode set to UP_DOWN)

1) SET on CMPA UP , and CLEAR on CMPB UP : CAU = 2  , CBU =1;

2) SET on CMPB DOWN , and CLEAR on CMPA DOWN : CBD = 2  , CAD =1;

For a condition where CMPA = CMPB,   The channels should ideally remain off during both conditions.  However setting (1) above gives a PWM output of 0 while setting (2) gives an output of 1.  I am curious if anyone else saw this difference.  I have disabled the deadband control ( DBCTL OUTMODE = 0).

Thanks,
Aditya