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TMS320F280049C: FSI Interface CRC

Expert 6760 points
Part Number: TMS320F280049C


Regarding FSI interface with multiple devices:

  • How is the CRC calculation done and how many instructions are needed?
  • Figure 5-3 of SPRACM3C (application note) is showing only the time for sending the data at the bus, but without the CRC calculation, correct? 

  • Hi Andreas,

    Andreas K said:
    How is the CRC calculation done and how many instructions are needed?

    The FSI module has a hardware implemented CRC submodule, both on the TX and RX side. See "CRC Submodule" sections in device TRM for details.

    Andreas K said:
    Figure 5-3 of SPRACM3C (application note) is showing only the time for sending the data at the bus, but without the CRC calculation, correct? 

    The HW implemented CRC checking of FSI was used in these tests. The image shows FSI TX time + FSI RX time with CRC calculation included.

    Best,

    Kevin

  • Hi Andreas,

    To add some additional clarification, the HW implemented CRC happens in parallel to the FSI data frame transmission and receiving. It does not add additional cycles/delay.

    Best,

    Kevin

  • Customers plan is to send-variables placed with a C structure in a RAM. (6  - 8 words). This ram location is linked with the DMA send module of the FSI.

     When they want to send the data ouf with the FSI:

    1. They lock the data an RAM from write access, so it stays consistent

    2. Then they only need to trigger the start of the FSI send sequence? The FSI modules calculates in parallel the CRC while moving data from RAM to the FSI send register out via DMA without any further interaction of the controller software?

    3. In other words, I do not need to move word by word of the TX data in the hardware CRC module before I trigger the write sequence of the FSI-DMA module?

    Is that approach fine/correct?

    Regards

    Andreas

  • Hi Andreas,

    Andreas K said:
    2. Then they only need to trigger the start of the FSI send sequence? The FSI modules calculates in parallel the CRC while moving data from RAM to the FSI send register out via DMA without any further interaction of the controller software?

    They should trigger the DMA in some way first to move data from their dedicated RAM section to the FSI TX buffer. The FSI TX can then be triggered by software or if the USER_DATA register is filled. An extra DMA channel can be used to fill the USER_DATA register if wanting to have automatic transmissions (i.e. no SW intervention needed).

    The FSI module will calculate the CRC byte and include it at the end of the FSI data frame after it's triggered to start transmitting. This happens in parallel to the transmission, not the moving of data to the FSI TX buffer.

    Please let me know if any of the above isn't clear or if you have any other related questions.

    Best,

    Kevin