CCS/TMS320F28388D: Erad Module Register : Unable to write with Eallow

I dont think its the eallow.

Can you try the example: 

And make sure it works.

Nima

Good morning.

Thanks for the response.

I have tested the example and I observed that the issue appears in Flash compilation, not in RAM compilation. Both, my code and the example, work propertly in RAM mode, but the Erad Owner register does not change in Flash compilation.

Is there any incompatibility between the ERAD module and the flash compilation?

Thanks.

I dont believe so. Vivek Singh can you comment?

Hi,

Can you provide the snapshot of the code (C as well as assembly) which updates the register.

Regards,

Vivek Singh

Good morning.

This issue also appears in the example "erad_ex9_ctm_max_load_profile_function" when I debug in CPU1_Flash configuration. I copy the code from there:

__eallow();
HWREGH(ERAD_GLOBAL_BASE + ERAD_O_GLBL_OWNER) = 1;
__edis();

__eallow();
EALLOW
HWREGH(ERAD_GLOBAL_BASE + ERAD_O_GLBL_OWNER) = 1;
MOVL XAR4, #0x05e80a
MOVB *+XAR4[0], #0x01, UNC
 __edis();

In CPU1_Flash configuration, the ERAD_O_GLBL_OWNER register starts in 2 and the value is not changed in the operation.

Thanks.

Thanks. We'll check and get back to you.

Regards,

Vivek Singh

Where do we stand on this issue?

Good afternoon. 

I have not found a solution for the issue. 

Only for clarification: in my code, if I change manually the Erad register, everything works fine. It appears to be only the Owner register.

Thanks.

Which ERAD register did you change manually? and by manually you mean in the CCS debug window?

Good afternoon.

I meant change the ERAD_O_GLBL_OWNER register in CCS debug windows.

Regards.

Once you changed GLBL OWNER in the CCS debug window, it began to operate as expected out of FLASH?

Good morning.

Yes. With a breakpoint in the part of the code that should change the GLBL OWNER register, I change it manually in the CCS debug windows (Only this register, the others ERAD configuration are changed by code). If I do that, the application works as expected in FLASH.

I'm using ERAD counters to counter some time between events and it works diferent in both compilations modes: In RAM mode, it works always correct, in FLASH, it works only if I change the register manually in the CCS debug window.

The example that you gave me seems to have the same problem: in Flash mode the register is not written.

Regards.

Can you do one test for me? 

Can you in FLASH mode, run through code, and single step through the line:

    __eallow();

    //
    // Application is owner
    //
    HWREGH(ERAD_GLOBAL_BASE + ERAD_O_GLBL_OWNER) = 1;

And report back whether the GLOBAL OWNER actually changes in the registers or not?

Also can you add a READ for the GLOBAL_OWNER?

if (HWREGH(ERAD_GLOBAL_BASE + ERAD_O_GLBL_OWNER) != 1) ?

That way we can make sure that this line is not going through.

Capture the value of the register before and after this write?

Nima

Good morning.

Thanks for your support.

I tried with the next code in Flash Mode:

//
// Application is owner
//
__eallow();
HWREGH(ERAD_GLOBAL_BASE + ERAD_O_GLBL_OWNER) = 1;

if (HWREGH(ERAD_GLOBAL_BASE + ERAD_O_GLBL_OWNER) != 1)
{
      HWREGH(ERAD_GLOBAL_BASE + ERAD_O_GLBL_OWNER) = 1;
}

I run single step through code and the register is not correctly write. The "if" condition is executed and the instruction HWREGH(ERAD_GLOBAL_BASE + ERAD_O_GLBL_OWNER) = 1; try to execute again, with same result.

Again, if I change it manually in the CCS debug register editor, the read is correct and the if condition is not executed.

Regards.

I just tested this on F28004x device, and it successfully ran. On both flash and ram. I am testing it on F2838x now.

Nima

Thanks for your answer.

Is there a way to track this bug in CCS to know when it will be fixed?

Best regards.