TMS320F280049: I2C Fifo Interrupts - Is the interrupt line hooked up?

Trey German8

Expert 1950 points

I'm having some difficulty getting the TX fifo to generate an interrupt on the I2c module of the 49. Is there any secret gating between the fifo interrupt line and the epie? Were fifo interrupts fully validated? Is it possible design forgot to hook this line up? What am I missing?

Looking at the module, I have the fifos turned on and out of reset, the interrupt is enabled in the module, and there is an interrupt pending:

If I haven't forgotten all my C2000 arch, that means I should see PIE IFR 8.2 set, but I do not:

One more piece of information, I can get normal I2C ints on the other vector. I have not tested the RX fifo interrupt because I can't receive until I can transmit.

Thanks,

Trey

over 5 years ago

0 Kevin Allen18 over 5 years ago

TI__Mastermind 45606 points

Hi Trey,

Can you share your interrupt configuration for both the PIE and I2C modules? If using DriverLib, something like the below should work:

    //
    // Initialize PIE and clear PIE registers. Disable CPU interrupts.
    //
    Interrupt_initModule();

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    //
    Interrupt_initVectorTable();

    //
    // Interrupts that are used in this example are re-mapped to ISR functions
    // found within this file.
    //
    Interrupt_register(INT_I2CA_FIFO, &i2cFIFO_isr);

    Interrupt_enable(INT_I2CA_FIFO);

    I2C_enableFIFO(I2CA_BASE);

    I2C_setFIFOInterruptLevel(I2CA_BASE, I2C_FIFO_TXEMPTY, I2C_FIFO_RXFULL);

    I2C_enableInterrupt(I2CA_BASE, I2C_INT_TXFF);

    I2C_clearInterruptStatus(I2CA_BASE, I2C_INT_TXFF);

May need to dig into the source of the above functions if not already using driverLib.

Best,

Kevin

0 Trey German8 over 5 years ago in reply to Kevin Allen18

Expert 1950 points

Kevin,

Thanks for the quick reply. I'm doing all of the above at various points in my application, but for the sake of this discussion let's forget about driverlib all-together and focus on the bits in the registers as that's what really matters.

Based on the following from the TRM:

I'm led to believe that if I am seeing the TXFFINT bit set (which I am), I should see the PIE IFR 8.2 bit set (which I am not). Would you agree with that?

Trey

0 Trey German8 over 5 years ago in reply to Trey German8

Expert 1950 points

Disregard, I needed to clear the fifo interrupt status because it was latently set from the fifo being empty during previous initialization. I'm dumb lol

Trey

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TMS320F280049: I2C Fifo Interrupts - Is the interrupt line hooked up?