TMS320F28388D: Problem to use the EtherCAT- RAM

Manuel Karch

Part Number: TMS320F28388D

We try to use the EtherCAT RAM as a normal RAM.
(We do not need the EtherCAT interface) But we are not able to write in this area.

What we noticed before is that there is a discrepancy regarding the addresses between the:
„Technical Reference Manual“ and the “Data Sheet”
exist.

Datasheet:

Reference Manual:

We have done/ tried the following:

Linker Command file of the CM:

And linked to a test section:

To this section a data struct was allocated with

#pragma DATA_SECTION

The follow code from the Examples was taken over:

CPU1:

SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_ETHERCAT,

ALLOCATE_TO_CM);

SysCtl_setECatClk(SYSCTL_ECATCLKOUT_DIV_5, SYSCTL_SOURCE_AUXPLL,

ESC_USE_INT_PHY_CLK);

(with different divider)

CM:

//ESC_resetESC();
SysCtl_resetPeripheral(SYSCTL_PERIPH_RES_ECAT);

ESCSS_initMemory(ESC_SS_BASE);

    //
    // Wait for ESCSS memory initialization to complete
    //
    if(ESCSS_getMemoryInitDoneStatusBlocking(ESC_SS_BASE, memoryTimeOut) != ESCSS_API_SUCCESS)
    {
      return(ESC_HW_INIT_FAIL);
     }

over 5 years ago

0 Christopher Chiarella over 5 years ago

TI__Mastermind 30255 points

Hello

You're correct about the datasheet. I'll get that corrected to 0x400A1000.

Are you trying to view the ECAT RAM in the CCS memory browser? If so, you need to enable the debug access for ECAT to see the values.

That code is below:

    while((HWREGH(ESC_SS_BASE + ESCSS_O_ACCESS_CTRL) &
           ESCSS_ACCESS_CTRL_ENABLE_DEBUG_ACCESS) !=
          ESCSS_ACCESS_CTRL_ENABLE_DEBUG_ACCESS)
    {
        ESCSS_enableDebugAccess(ESC_SS_BASE);
    }

Best regards

Chris

0 Manuel Karch over 5 years ago in reply to Christopher Chiarella

Prodigy 20 points

Hello Chris,

thx for your quick response.
(Sorry for the late Reply)

"Are you trying to view the ECAT RAM in the CCS memory browser?"
Yes you were right.

Now I tried to yerfy it with the enabled access (your code) and without the debugger memory view.
But I still have no success the Bytes of this RAM range remains on the value 0.
(I have verified my testcode by using a "valid" RAM sector)

I guess we are doing something wrong in the initialization. We do not know exactly what we have to do or what we are not allowed to do.
(on CPU1 and CM)

Best regards

Manuel

0 Anu Biradar over 5 years ago

TI__Expert 5630 points

Hello,

Chris will get back to you the week of November 30th.

Thanks,

Anu

0 Christopher Chiarella over 5 years ago in reply to Manuel Karch

TI__Mastermind 30255 points

Manuel

I'm just modifying the EtherCAT examples we provide and all seems to be working.

In the ESC_initHW() API that is provided, you should already find this debug access code within a PDI_HAL_TEST macro, which you can comment out to enable it. Make sure you are doing it in the same place in your flow.

I did a test where I ran the below to write the data. Make sure if using that API that you start at 0x1000 or later to avoid the EtherCAT registers.

ESC_writeDWordISR(0x12345678, 0x1000);

Best regards

Chris

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TMS320F28388D: Problem to use the EtherCAT- RAM