TMS320F28377D: Problems of reading and writing SDRAM

Dear team:

One of my clients found that when writing data to a fixed address of CS0 chip selection when operating external SDRAM (MT48LC4M16A2P) through emif2, all addresses will become the data.

Referring to emif1_16bit_sdram_far_cpu01 and emif_32bit_sdram_cpu01 projects from controlSUITE, he changed the emif1 configuration of the two demos to emif2 for testing. The following are the test results and code:

void main(void)
{
int i = 0;

InitSysCtrl();
InitGpio(); // Skipped for this example
DINT; // Disable interrupts
InitPieCtrl();

//Disable CPU interrupts and clear all CPU interrupt flags;
EALLOW;
IER = 0x0000;
IFR = 0x0000;
EDIS;

InitPieVectTable();

EALLOW;
EINT;
EDIS;

//#step1 
EALLOW;
ClkCfgRegs.PERCLKDIVSEL.bit.EMIF2CLKDIV = 1;
EDIS;

EALLOW;
//#step2

//#step3 
Emif2ConfigRegs.EMIF2ACCPROT0.all = 0x0;

//#step4
Emif2ConfigRegs.EMIF2COMMIT.all = 0x1;

//#step5
Emif2ConfigRegs.EMIF2LOCK.all = 0x1;
EDIS;

//#step6
setup_emif2_pinmux_sdram_16bit(0);

//#step7
InitEmif2(); 

//#step8 
for(i = 0; i<123; i++){}

while(1)
{
sdram_read_write2(0x90000000, 0x500);
}
}


void InitEmif2(void)
{
Emif2Regs.SDRAM_TR.bit.T_RFC = 5; 
Emif2Regs.SDRAM_TR.bit.T_RP = 1; 
Emif2Regs.SDRAM_TR.bit.T_RCD = 1; 
Emif2Regs.SDRAM_TR.bit.T_WR = 1; 
Emif2Regs.SDRAM_TR.bit.T_RAS = 4; 
Emif2Regs.SDRAM_TR.bit.T_RC = 5; 
Emif2Regs.SDRAM_TR.bit.T_RRD = 1; 
Emif2Regs.SDR_EXT_TMNG.bit.T_XS = 6; 
Emif2Regs.SDRAM_RCR.bit.REFRESH_RATE = 1562; /

//ClkCfgRegs.PERCLKDIVSEL.bit.EMIF2CLKDIV = 1; //1:100MHz;0:200MHz
Emif2Regs.SDRAM_CR.bit.SR = 0; 
Emif2Regs.SDRAM_CR.bit.NM = 1; 
Emif2Regs.SDRAM_CR.bit.CL = 3; 
Emif2Regs.SDRAM_CR.bit.BIT_11_9_LOCK = 1; 
Emif2Regs.SDRAM_CR.bit.IBANK = 2; 
Emif2Regs.SDRAM_CR.bit.PAGESIGE = 0; 
EDIS;



}


//Read data only
char sdram_read_write2(Uint32 start_addr, Uint32 mem_size)
{
Uint16 mem_rdl;
Uint16 mem_wdl;
Uint32 XMEM_p;
Uint32 i;

//Write data
XMEM_p = start_addr;

//Fill memory
mem_wdl = 0x0123;
for (i=0; i < mem_size; i++)
{
__addr32_write_uint16(XMEM_p, mem_wdl);
XMEM_p = XMEM_p+2;
mem_wdl += 0x0001;
}
}

//IO
void setup_emif2_pinmux_sdram_16bit(Uint16 cpu_sel)
{
int i;

for (i=53; i<=68; i++)
{
GPIO_SetupPinMux(i,cpu_sel,3);
}
for (i=96; i<=121; i++)
{
GPIO_SetupPinMux(i,cpu_sel,3);
}

//
//configure Data pins for Async mode
//
for (i = 53; i <= 68; i++)
{
GPIO_SetupPinOptions(i,0,0x31);
}
}

Best Regards