• State TI Thinks Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 2 answers
  • Subscribers 84 subscribers
  • Views 2278 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

F28069 ADC Ref guide

fl429
Prodigy 10 points
Other Parts Discussed in Thread: CONTROLSUITE

I am new to this uP.

It seems that ADC Ref guide for 2802x/2803x (SPRUGE5B) does not match the A/D on F28069.

I am looking at F2806x_ADC.h file coming with the ControlSuite. The structure does not seem to match the Ref Guide.

Where can I get the correct manual on ADC of 2806x?

Thanks

Greg

  • 0
    TI__Guru* 92750 points

    fl429 said:

    I am new to this uP.

    It seems that ADC Ref guide for 2802x/2803x (SPRUGE5B) does not match the A/D on F28069.

    I am looking at F2806x_ADC.h file coming with the ControlSuite. The structure does not seem to match the Ref Guide.

    Where can I get the correct manual on ADC of 2806x?

    Thanks

    Greg

    Greg,

    More documentation will be coming soon (March I believe).  In the meantime I hope this will help:

    Normal 0 false false false EN-US X-NONE X-NONE MicrosoftInternetExplorer4

    The analog peripherals remain functionally the same for both the 2806x and 2803x device groups with the following changes:

    • An extra divider to the ADCCLK has been added in the ADCCTL2 register. This bit (CLKDIV4EN) adds SYSLK/4 as an option for the ADC Clock to CPU Clock ratio for the 2806x.
    • Additional ADC Start-Of-Conversion (SOC) triggers have been added on the 2806x to allow for triggering from the additional ePWM8/HRPWM8 channel.
    • The 2806x ADC Result registers are DMA accessible as well as CLA accessible. Reads of these registers by the CLA, DMA, and CPU are independent of each other and can all occur simultaneously without issue.
    • An ADCNONOVERLAP bit in the ADCCTL2 register resolves the ADC first sample issue on 2802x and 2803x Rev. 0 silicon.

    Regards,

    -Lori

  • 0 in reply to Lori Heustess
    Prodigy 30 points

    Lori,

    You mention that the F28069 does have additional SOC triggers for ePWM8.  What are those values, for ADCSOCA and ADCSOCB, for setting in TRIGSEL within the ADCSOCxCTL register?  Also, you mentioned that updated documentation (the the F2806x line, I assume) would be posted soon - as in March of 2011.  Are there any updated estimates on that documentation's delivery date?  If I've overlooked it, please direct me to the proper URL.

    Thanks in advance,

    --Eric

  • 0 in reply to Eric_Stark
    Intellectual 695 points

    Any update on the TRIGSEL values for ADCSOCA and ADCSOCB when using ePWM8?

  • 0 in reply to John Lagerquist
    TI__Guru* 92750 points

    RallyTronics said:

    Any update on the TRIGSEL values for ADCSOCA and ADCSOCB when using ePWM8?

    Hello,

    TRIGSEL is documented in the 2806x Technical Reference Manual www.ti.com/lit/SPRUH18

    Please refer to Table 8-18. ADC SOC0 - SOC15 Control Registers (ADCSOCxCTL) Register Field Descriptions

    Cheers

    Lori