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CCS/TMS320F28388D: How to implement the SCI kernel project for F28388D?

Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Dear Sir,

Actually there are some kernel project in the installation directory.

for example, D:\ti\c2000\C2000Ware_3_03_00_00\driverlib\f28004x\examples\flash

But I can not find the SCI kernel project for F28388D under  directory D:\ti\c2000\C2000Ware_3_03_00_00\driverlib\f2838x

So how should i realize the live firmware update for F28388D?

Thanks!

zhou ping

  • Hi,

    The subject matter expert assigned to this thread is out of office this week due to the the US holiday so you may not get a qualified answer until Tuesday or Wednesday next week.  I apologize for the delay.

    Regards,

    Himanshu

  • Zhou, 

    We are currently working on SCI Flash Kernel implementation on F28388D. It should be available early 2Q next year.

    Thanks,

    Sira

  • Dear Sira

    Is there any alternative solution?

    Our project is a little urgent.

    I guess if one F283** chip has the similar memory map, we can use its SCI kernel project for F28388D.

    Please correct me.

    Thanks!

    Zhou ping

  • Hi Zhou, I will ask the engineer working on this to reply.

    Thanks,

    Sira

  • Zhou,

    Live Firmware Update (LFU) on F28388D will be complex - given the single bank Flash. F28004x has dual bank Flash and its SCI Flash kernel has LFU support. You can read more at SPRUIU8, SPRUIU9 (LFU with/without device reset). 

    Single bank Flash LFU is doable - there have been some interactions with customers interested in this. See here:

    Please note the scope of SCI Flash Kernel development on F28388D does not include LFU support.

    Could you let me know what your end application is? Do you need LFU with or without device reset?

    Thanks,

    Sira

  • Zhou, 

    The memory map for F2837xD is similar to F28388D with respect to the number of GSRAM sections, F28388D has some more LSRAM sections. Please refer to memory maps for both devices in their respective datasheets. However, since there are no bootloaders on CPU2 for F28388D, CPU1 will need to stream in the CPU2 flash kernel and then send an IPC command to CPU2 to execute the kernel and stream in the application

    Thanks,

    Anu

  • Dear Sira,

    Regarding our end application, there are many subPCBs with a CPLD and a F28388D, the F28388D is opened for live firmware update.

    And there is a mainPCB which delivers bin file data to CPLD via fiber, Then CPLD delivers the bin file data to F28388D to update the flash on F28388D.

    Because the subPCB with F28388D is installed in an environment where users are hard to reach.

    So we use fiber.

    So actually we need a Flash Kernal (no matter SCI or USB or SPI,) running on F28388D to receive the bin file data from CPLD, then write(update) the flash on F28388D.

    Actually we need LFU with device reset.

    for my understanding, LFU without device reset is much more difficult.

    Reset during firmware update is acceptable in our application.

    Thanks!

    Zhou ping

  • Hi Zhou,

    Fascinating. It's good to learn of the specifics here.

    I would suggest you look at the link I sent above to understand single bank LFU.

    We are pushing for early completion of the F28388D Flash kernel implementation, and we could consider making a customer specific release once done. You may want to contact your local FAE to place a request.

    For now, I will go ahead and close the thread, unless you had any further questions?

    Thanks,

    Sira

  • Dear Sira,

    Sorry,

    Who is my FAE?

    I am in SIEMENS, Beijing, China.

    Thanks!

  • Hi Ping, I've requested Product Marketing to guide you with this. They should respond soon.

    Thanks,

    Sira

  • Hi Ping, we will have more concrete details closer to the completion date of this work ~Feb 2021. Please contact us then on e2e for an update. For now, I will close this.