Part Number: LAUNCHXL-F280049C
Tool/software: Code Composer Studio
hi,
1.I copied the code from the example hrpwm_ex2_prdupdown_sfo_v8,
however, there is no control through the TBPRDHR or EPwm1Regs.CMPA.bit.CMPAHR register. through the register EPwm1Regs.CMPA.bit.CMPA control works, but it is not HRPWM. SFO calibration succeeds.
2. I also want to understand how I can quickly turn off any of the channels, preferably without changing the settings. I can probably do this by changing the GPAMUX1 register, but this is probably a bad idea.
Initialization code:
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 1; // Disable pull-up on GPIO0 (EPWM1A)
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // Configure GPIO0 as EPWM1A
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 1; // Disable pull-up on GPIO1 (EPWM1B)
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // Configure GPIO1 as EPWM1B
EDIS;
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // set Shadow load
EPwm1Regs.TBPRD = Period; // PWM frequency = 1/(2*TBPRD)
EPwm1Regs.CMPA.bit.CMPA = Period / 3; // set duty 50% initially
EPwm1Regs.CMPA.bit.CMPAHR = (1 << 8); // initialize HRPWM extension
EPwm1Regs.CMPB.bit.CMPB = Period / 3; // set duty 50% initially
EPwm1Regs.CMPB.all |= 1;
EPwm1Regs.TBPHS.all = 0;
EPwm1Regs.TBCTR = 0;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Select up-down
// count mode
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1; // TBCLK = SYSCLKOUT
EPwm1Regs.TBCTL.bit.FREE_SOFT = 11;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // LOAD CMPA on CTR = 0
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // PWM toggle high/low
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBU = AQ_SET; // PWM toggle high/low
EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR;
EALLOW;
EPwm1Regs.HRCNFG.all = 0x0;
EPwm1Regs.HRCNFG.bit.EDGMODE = HR_BEP; // MEP control on both edges.
EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP; // CMPAHR and TBPRDHR HR control.
EPwm1Regs.HRCNFG.bit.HRLOAD = HR_CTR_ZERO_PRD; // load on CTR = 0 and CTR = TBPRD
EPwm1Regs.HRCNFG.bit.EDGMODEB = HR_BEP; // MEP control on both edges
EPwm1Regs.HRCNFG.bit.CTLMODEB = HR_CMP; // CMPBHR and TBPRDHR HR control
EPwm1Regs.HRCNFG.bit.HRLOADB = HR_CTR_ZERO_PRD; // load on CTR = 0 and CTR = TBPRD
EPwm1Regs.HRCNFG.bit.AUTOCONV = 1; // Enable autoconversion for HR period
EPwm1Regs.HRPCTL.bit.TBPHSHRLOADE = 1; // Enable TBPHSHR sync (required for updwn count HR control)
EPwm1Regs.HRPCTL.bit.HRPE = 1; // Turn on high-resolution period control.
EPwm1Regs.TBCTL.bit.SWFSYNC = 1; // Synchronize high resolution phase to start HR period
EDIS;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwm1Regs.DBFED.bit.DBFED = 20;
EPwm1Regs.DBRED.bit.DBRED = 20;