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CCS/TMS320F28379D: Memory Allocation display and memory allocation configured in cmd file.

Part Number: TMS320F28379D

Tool/software: Code Composer Studio

Dear TI hello,

I have a question about the Memory Allocation,

I am using all my memory RAMGS1 to RAMGS13 to get compile my project but, when I open the memory allocation, most of my memory is empty!

Here is a capture for the memory allocation and the cmd file.

I am alining by 4 the memory because I am using a freeRTOS project and in the portmacro.h file I have this:

#define portBYTE_ALIGNMENT      4 

Do you have a factorized cmd file with all sections with one section for RAMGS and RAMLS? 

Thank you in advance for clarifications,

S.kTarik

  • Hi,

    Looks like the ebss section is small enough to fit in LS5 and GS0. There are no variables allocated in the other GSRAMs, hence you see them empty.

    If needed, you can combine them and have it as a single memory block.

    For example,

    RAMGS0 : origin = 0x00C000, length = 0x001000
    RAMGS1 : origin = 0x00D000, length = 0x001000

    This can be combined as a single block

    RAMGS01 : origin = 0x00C000, length = 0x002000

    You can combine n number of RAMs as long as the addresses are contiguous.

    By default, we keep them as separate memory blocks, in case application wants to use them for different purposes.

    Regards,

    Veena

  • Veena,

    Thank you for your answer,

    I resolved my issue in the .cmd file, 

    I have another issue:

    I am using freeRTOS, the PC jumps to the interrupt void ILLEGAL_ISR(void) after executing the _portRESTORE_FIRST_CONTEXT in porASM.asm.

    _portRESTORE_FIRST_CONTEXT
    ; Restore stack pointer from new task control block.
    MOVL XAR0, #_pxCurrentTCB
    MOVL XAR0, *XAR0
    MOVL XAR0, *XAR0
    MOV @SP, AR0

    ; Restore XAR4 and RPC from saved task stack.
    ; and return to main task function.
    ; SP should be set to stack start plus 2 before LRETR.
    SUBB SP, #28
    POP XAR4
    SUBB SP, #14
    POP RPC
    SUBB SP, #10
    LRETR

    I am not very familiar with TI assembly code but, I could dig into details if you could help me.

    I am using the TMS320f28379D launch xl for the tests,

    I modified the cmd file, you could find it in the project, you don't need to link anything, all resources are in the project.

    Before this modification, the RTOS runs well.

    Thank you in advance,

    S.Tarik 

    univcadiayyad-my.sharepoint.com/.../EeO_RCHXm6xDlJ6KQtT5mcsBVOcDf7YCL03T66XUCLjRQQ

  • Hi S.Tarik,

    So, the issue happened after you updated the cmd file. Is that right?

    Can you check the value of RPC register just before LRETR instruction. This should hold the address of the first task.

    Regards,

    Veena

  • Hi Veena,

    Veena Kamath said:
    So, the issue happened after you updated the cmd file. Is that right?

    Yes,

    The RPC = 0x0 befor LRETR!

  • Hi S.Tarik,

    Looks like your task stack is not updated as expected.

    I hope this is on the CPU1 side. The GSRAMs are shared between CPU1 and CPU2 and I believe the ownership of all the GSRAMs are assigned properly. By default GSRAMs are owned by CPU1.

    Regards,

    Veena 

  • Veena Kamath said:
    Looks like your task stack is not updated as expected.

    Venna,

    How you could pretend that this is a Stack issue?

    I change the .ess section from GSRAMs to LSRAMs and it seems to work well. One section was not enough to fit, I concatenate many LSRAMs to get proper compiled and it run well.

    I have only the CPU1 activated, I could understand why this couldn't work with GSRAM?

    Thanks

  • Hi,

    The task stacks typically contains the return address of the task  which will be used by the task restore routine. 

    I am not sure why allocating them in GSRAMs is not working. Can you create global variable, allocate to GSRAM, initialize the  variable in main and check if you can see the value in the memory?

    Also, please configure the GSRAM ownership to CPU1 incase not done. 

    Regards,.

    Veena

  • Hi,

    I haven’t heard from you for the last few weeks, so I’m assuming you were able to resolve your issue. If this isn’t the case, please reject this resolution and reply to this thread. If this thread locks, please click the "Ask a related question" button and in the new thread describe the current status of your issue and any additional details you may have to assist us in helping to solve your issues.

    Happy new year!

    Regards,

    Veena

  • Hello Veena,

    I have to use the LSRAM for .ess variables and it works well,

    sorry for the delayed replay, I don't have any idea why this is not working using GSRAM

    Thank you