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LAUNCHXL-F280049C: In slave mode, how can I detect slave select (SPISTE) to sync with message start?

Part Number: LAUNCHXL-F280049C

We want to 'frame' our SPI messaging with the chip select / slave select / spiste signal so that when the signal goes down it is an indication to the slave that a new message frame starts.

How can I do this in slave mode in F280049C, seems like a trivial question and obvious requirement but have been googling for a better part of an hour now...not mention going through the tech ref manual.

wbr Kusti

  • Kusti,

    When F280049 SPI is configured as slave device. SPISTE pin is not controlled (pulling low / high) by the slave. It is controlled your SPI Master.

    In F280049 SPI GPIO configuration code, you just need to configure your SPI pins (SPICLK, SPISTE, SPISIMO, SPISOMI). Then your SPI Master device should be able to pull SPISTE pin low to start / end message frame.

    Regards,

    Manoj

  • Thank you.

    However, that was not the question. I know all about that and I have the communication working.

    The question is how can the slave know which byte is the first byte of a message?

    In SPI the SLAVE SELECT (SPISTE in TI terminology) indicates the start of a message. This is the very essence of SPI communication and every two penny half penny SPI enabled ADC or what ever works based on that.

    So how can I detect that in the software?

    The wrong answer is to start in sync and hope for the best. For any reliability conscious engineer that is no go. Consider the master or slave resetting because of a hardware glitch, watchdog or EMI noise causing extra clock edges.

    So we need to identify the start of message. Sure that can be done at the software level but for long messages the overhead is big and the recovery from a lost sync is going to take long time.

    And why should we do this in software when the hardware is there?

    We only need to know that when a byte arrives it that was the first byte of after falling edge of SS or not.

    I do not see any direct facility in C2000 chips for that. 

    Can I for example use the GPIO pin interrupt facility to get an interrupt when the SPISTE goes down in the slave?

    For example SPISTEB shares pin with GPIO 27 so can I get an interrupt from that pin when SPI is enabled?

    if not, is my only optio to route the SS from the master to the SPISTEB and some GPIO pin in the slave?

    wbr Kusti

  • Kusti,

    Can I for example use the GPIO pin interrupt facility to get an interrupt when the SPISTE goes down in the slave?

    For example SPISTEB shares pin with GPIO 27 so can I get an interrupt from that pin when SPI is enabled

    You can use Input X-BAR and XINT together to trigger a CPU interrupt when SPISTE pin goes low.

    Regards,

    Manoj

  • Brilliant! We will test this. Perhaps not ideal to waste an GPIO pin on this but we can live with that. Thanks!
    IMO this issue and this workaround should be in the manual.

    wbr Kusti