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CCS/LAUNCHXL-F280049C: Running standalone from Flash.

Kustaa Nyholm
Expert 2005 points
Part Number: LAUNCHXL-F280049C
Other Parts Discussed in Thread: MOTORWARE, C2000WARE

Tool/software: Code Composer Studio

I have project that was originally derived from motorWare lab project.

At some point in time we needed to modify the linker file 'f28004x_ram_cpu_is.cmd'.

For this purpose the file was copied into the top level of the project source tree.

And that works.

However if I change to build config 'Flash_LIB' then obviously our changes to  'f28004x_ram_cpu_is.cmd' are not picked up.

If I then include the  'f28004x_flash_cpu_is.cmd' I get warnings and errors for "memory range has already been specified" and "memory range overlaps existing memory range " 

Removing the 

When I look at the compiler/linker command in the console it refers to:

"/Applications/ti/c2000/C2000Ware_MotorControl_SDK_3_00_01_00/solutions/boostxl_drv8320rs/f28004x/cmd/f28004x_flash_cpu_is.cmd"



So what is going on, why did the copy to project worked for the ram case but not for the flash case?

Where is this explained?

I've also seen a linker file command line somewhere in the project that refers to the object files as './file' and

to the linker cmd file as '../file.cmd' but obviously the later cannot refer to the same directory as the former

because there is no '../file.cmd' in the my disk, so again, what is going on and where is this explained?



Manuals full of screen shots and walk throughs of naive stuff but fundamentals are difficult to find.

I don't much appreciate these automatic tools because when they fail they are next to impossible to debug for the average joe coder. :/

I appreciate the great support from TI in these forums though. :) 

wbr Kusti

e2e.ti.com/.../878674

  • 0
    TI__Guru** 115420 points

    The project can't use the cmd files for RAM and FLASH configuration at the dame file. Which lab did you refer to?

    Could you please post the error messages reported by the CCS compiler? And post the .cmd file you changed?

  • 0 in reply to Yanming Luo
    Expert 2005 points

    Hi,

    thank you for answering.

    The project was originally MotorControlSDK  is07_speed_control.

    I will attach the .cmd file at the end.

    I understand that I cannot use two files at the same time and that two files are the root of my problem.

    What I don't understand how the different build configurations pickup which file they use because it seems to be automagical.

    I would prefer to keep the .cmd files in the project and not in the TI source tree which is not in our version control.

    I would also like to understand why is that we have so little RAM available for the programs and how to change that,

    after all this F280049C should have 100kB of RAM.

    The error messages I get are like this:

    Description Resource Path Location Type
    #10010 errors encountered during linking; "MyProject.out" not built MyProject C/C++ Problem
    #10263 BEGIN memory range has already been specified f28004x_ram_cpu_is.cmd /MyProject line 39 C/C++ Problem
    #10263 BOOT_RSVD memory range has already been specified f28004x_ram_cpu_is.cmd /MyProject line 68 C/C++ Problem
    #10263 CLA1MSGRAMHIGH memory range has already been specified f28004x_ram_cpu_is.cmd /MyProject line 79 C/C++ Problem
    #10263 CLA1MSGRAMLOW memory range has already been specified f28004x_ram_cpu_is.cmd /MyProject line 78 C/C++ Problem
    #10263 patch_EST_Angle_run_patchable_address memory range has already been specified f28004x_ram_cpu_is.cmd /MyProject line 42 C/C++ Problem

    Here is the cmd file:

    Fullscreen f28004x_ram_cpu_is.txt Download 
    /*
// TI File $Revision: /main/3 $
// Checkin $Date: Agu 1, 2017   13:45:43 $
//
// FILE:    F280049_RAM_CPU.cmd
//
// TITLE:   Linker Command File For F280049 examples that run out of RAM
//
//
//          Keep in mind that L0,L1,L2,L3 and L4 are protected by the code
//          security module.
//
//          What this means is in most cases you will want to move to
//          another memory map file which has more memory defined.
//
*/

/*========================================================= */
/* Define the memory block start/length for the F2806x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes:
         Memory blocks on F280049 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program
         and/or data.

         Contiguous SARAM memory blocks can be combined
         if required to create a larger memory block.
*/

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to Flash" bootloader mode   */
   BEGIN           	: origin = 0x080000, length = 0x000002
   RESET            : origin = 0x3FFFC0, length = 0x000002

   patch_EST_Angle_run_patchable_address           : origin = 0x009000, length = 0x00000e
   patch_EST_Dir_run_patchable_address             : origin = 0x00900e, length = 0x00000e
   patch_EST_Eab_run_patchable_address             : origin = 0x00901c, length = 0x00000e
   patch_EST_Flux_ab_estFluxDot_patchable_address  : origin = 0x00902a, length = 0x00000e
   patch_EST_Flux_dq_run_patchable_address         : origin = 0x009038, length = 0x00000e
   patch_EST_Flux_run_patchable_address            : origin = 0x009046, length = 0x00000e
   patch_EST_Freq_run_patchable_address            : origin = 0x009054, length = 0x00000e
   patch_EST_Iab_run_patchable_address             : origin = 0x009062, length = 0x00000e
   patch_EST_Idq_run_patchable_address             : origin = 0x009070, length = 0x00000e
   patch_EST_Ls_run_patchable_address              : origin = 0x00907e, length = 0x00000e
   patch_EST_OneOverDcBus_run_patchable_address    : origin = 0x00908c, length = 0x00000e
   patch_EST_Rr_run_patchable_address              : origin = 0x00909a, length = 0x00000e
   patch_EST_RsOnLine_run_patchable_address        : origin = 0x0090a8, length = 0x00000e
   patch_EST_Rs_run_patchable_address              : origin = 0x0090b6, length = 0x00000e
   patch_EST_Vab_run_patchable_address             : origin = 0x0090c4, length = 0x00000e
   patch_EST_Vdq_run_patchable_address             : origin = 0x0090d2, length = 0x00000e
   patch_EST_runEst_patchable_address              : origin = 0x0090e0, length = 0x00000e

   RAMGS1_3         : origin = 0x00E000, length = 0x006000
   RAMLS4_7         : origin = 0x00A000, length = 0x002000

/*   FLASHB0_SA		: origin = 0x080002, length = 0x00FFFE	*/	/* on-chip Flash */
/*   FLASHB1_SA   	: origin = 0x090000, length = 0x010000	*/	/* on-chip Flash */


PAGE 1 :
   BOOT_RSVD        : origin = 0x000002, length = 0x0000F3      /* Part of M0, BOOT rom will use this for stack */
   RAMM0_1        	: origin = 0x0000F5, length = 0x00070B

/* CLA1             : origin = 0x001400, length = 0x000080	*/ /* Defined in headers cmd file*/

   RAMGS0_A         : origin = 0x00C000, length = 0x002000

   RAMLS0_1         : origin = 0x008000, length = 0x001000		/* Can't be used, reserved for FAST object */
   RAMLS2_3         : origin = 0x009100, length = 0x000F00		/* */

   CLA1MSGRAMLOW    : origin = 0x001480, length = 0x000080
   CLA1MSGRAMHIGH   : origin = 0x001500, length = 0x000080

}

SECTIONS
{
   .TI.ramfunc      : > RAMLS4_7,        PAGE = 0, ALIGN(4)
   codestart        : > BEGIN,     		 PAGE = 0, ALIGN(4)
   .text            : > RAMGS1_3,        PAGE = 0, ALIGN(4)
   .cinit           : > RAMGS1_3,        PAGE = 0, ALIGN(4)
   .pinit           : > RAMGS1_3,        PAGE = 0, ALIGN(4)
   .switch          : > RAMGS1_3,        PAGE = 0, ALIGN(4)
   .reset           : > RESET,           PAGE = 0, TYPE = DSECT

	/* Digital Controller Library functions */
	dclfuncs		: > RAMGS1_3,		 PAGE = 0
	dcl32funcs		: > RAMGS1_3,	     PAGE = 0

   .stack           : > RAMM0_1,          PAGE = 1
   .ebss            : > RAMGS0_A  | RAMLS2_3,        PAGE = 1
   .econst          : > RAMGS0_A,        PAGE = 1
   .esysmem         : > RAMGS0_A,        PAGE = 1

/* Cla1RegsFile     : > CLA1,            PAGE = 1	*/ /* Defined in header .cmd file*/

   .bss_cla         : > RAMLS2_3,        PAGE = 1

   Cla1Prog         : > RAMLS4_7,        PAGE = 0
   Cla1Prog2        : > RAMLS4_7,        PAGE = 0

   Cla1ToCpuMsgRAM  : > CLA1MSGRAMLOW,   PAGE = 1
   CpuToCla1MsgRAM  : > CLA1MSGRAMHIGH,  PAGE = 1

   .const_cla       : > RAMLS2_3,        PAGE = 1

   .scratchpad      : > RAMLS2_3,        PAGE = 1

   patch_EST_Angle_run_patchable_section           : >  patch_EST_Angle_run_patchable_address,           PAGE = 0
   patch_EST_Dir_run_patchable_section             : >  patch_EST_Dir_run_patchable_address,             PAGE = 0
   patch_EST_Eab_run_patchable_section             : >  patch_EST_Eab_run_patchable_address,             PAGE = 0
   patch_EST_Flux_ab_estFluxDot_patchable_section  : >  patch_EST_Flux_ab_estFluxDot_patchable_address,  PAGE = 0
   patch_EST_Flux_dq_run_patchable_section         : >  patch_EST_Flux_dq_run_patchable_address,         PAGE = 0
   patch_EST_Flux_run_patchable_section            : >  patch_EST_Flux_run_patchable_address,            PAGE = 0
   patch_EST_Freq_run_patchable_section            : >  patch_EST_Freq_run_patchable_address,            PAGE = 0
   patch_EST_Iab_run_patchable_section             : >  patch_EST_Iab_run_patchable_address,             PAGE = 0
   patch_EST_Idq_run_patchable_section             : >  patch_EST_Idq_run_patchable_address,             PAGE = 0
   patch_EST_Ls_run_patchable_section              : >  patch_EST_Ls_run_patchable_address,              PAGE = 0
   patch_EST_OneOverDcBus_run_patchable_section    : >  patch_EST_OneOverDcBus_run_patchable_address,    PAGE = 0
   patch_EST_Rr_run_patchable_section              : >  patch_EST_Rr_run_patchable_address,              PAGE = 0
   patch_EST_RsOnLine_run_patchable_section        : >  patch_EST_RsOnLine_run_patchable_address,        PAGE = 0
   patch_EST_Rs_run_patchable_section              : >  patch_EST_Rs_run_patchable_address,              PAGE = 0
   patch_EST_Vab_run_patchable_section             : >  patch_EST_Vab_run_patchable_address,             PAGE = 0
   patch_EST_Vdq_run_patchable_section             : >  patch_EST_Vdq_run_patchable_address,             PAGE = 0
   patch_EST_runEst_patchable_section              : >  patch_EST_runEst_patchable_address,              PAGE = 0
   .big_stuff      : > RAMGS1_3,        PAGE = 0, ALIGN(4)
}

SECTIONS
{
	sysctrl_data	: > RAMM0_1 | RAMLS2_3,    PAGE = 1
	ctrl_data		: > RAMM0_1 | RAMLS2_3,    PAGE = 1
}

SECTIONS
{
	datalog_data	: > RAMGS0_A | RAMLS2_3,   PAGE = 1
	graph_data		: > RAMGS0_A | RAMLS2_3,   PAGE = 1
  
}

  • 0 in reply to Kustaa Nyholm
    Expert 2005 points

    PS had to rename the .cmd to .txt because this forrum does not allow .cmd files.

  • 0 in reply to Kustaa Nyholm
    TI__Guru** 115420 points

    Please refer to the lab in motorControlSDK, just use one .cmd file for a build configuration in a project. You might use the lab example and port your code to it id you don't want to spend time to understand more by the linl below.

    If you haven't had a chance to look at the workshop material, I think this will help demystify some of the terminology and architecture as well.

    https://training.ti.com/c2000-mcu-device-workshops

  • 0 in reply to Yanming Luo
    Expert 2005 points

    Thanks but that does not help.

    I seem to have hard time communication my problems effectively.

    I know how to create linker files.

    I need two linker files, one for RAM and one for Flash.

    I need the linker files in my project because they are not standard and they need to be under version control.

    I have the files.

    But CCS seems to insist using both my files and its own default files.

    I have named my files as follows:

    MOD_f28004x_flash_cpu_is.cmd
    MOD_f28004x_ram_cpu_is.cmd

    If I have them both in the project I get errors from duplicate and overlapping defs.

    If I have only MOD_f28004x_ram_cpu_is.cmd in the project and select RAM_Lib config then everything builds ok.

    But if I have only MOD_f28004x_flash_cpu_is.cmd in the project then I get errors no matter if RAM_Lib or Flash_Lib config is selected.

    When I go to Project/Properties/General and look at "Linker command file:" for each of the configrations RAM_Lib and Flash_Lib I see that the correct MOD_xxx file is selected so everything looks good. But it isn't.

    This must be something very trivial and wrong in the Flash_LIB configuration but I cannot figure it out.

    'wbr Kusti

  • 0 in reply to Kustaa Nyholm
    Guru 92251 points

    Kustaa Nyholm said:
    When I go to Project/Properties/General and look at "Linker command file:" for each of the configrations RAM_Lib and Flash_Lib I see that the correct MOD_xxx file is selected so everything looks good. But it isn't.

    The issue could be that by default that CCS passes all .cmd files in the project to the linker.

    Maybe you exclude the unwanted .cmd file from each of the configurations as per Exclude Files from Build. I.e. when the RAM_Lib config is selected exclude the MOD_f28004x_flash_cpu_is.cmd file and vice-versa. for the Flash_Lib config.

  • 0 in reply to Chester Gillon
    Expert 2005 points

    Thanks,  that answer is on the right track. A coworker figured this out. There was a virtual file/link to the TI .cmd file in one of those virtual folders that the stupid project explorer shows. Removing that or excluding it from the build and setting the Project/Properties/General/Linker command file" for both configs solved the problem. Whoever came up with those virtual folders and files should be <insert your favourite punisment here>. TI is not for beginners and children, why make the tools childish. We adults know what a file is, we know how to use makefiles etc etc. It seems that marketing and business has driven some design decisions in CCS more than usability and reason.

    Thanks again for the great support.