Part Number: TMS320F28335
Other Parts Discussed in Thread: C2000WARE
Tool/software: Code Composer Studio
Hi,
I have a custom TMS320F28335 board with which I am trying to communicate with an arduino mega using SCI/UART interface.
I am sending 10 data bytes from arduino and trying to receive and see them in debug mode in CCS.I am putting a breakpoint at j=0 line and to see the data so far collected. which should be 10 bytes of data that is collected. At the arduino side the code is continously sending numbers 1234567890. What I am receiving in the expressions window when I check Received char array is bunch of random numbers. sometimes i get the correct sequence in between but mostly I see random data. Can anyone point to me what is the mistake that I am doing.
My code is as follows:
#include "DSP28x_Project.h"
void scic_regs_init(void);
void scic_fifo_init(void);
int j=0;
int k =0;
void main(void)
{
char ReceivedChar[10];
InitSysCtrl();
InitSci();
DINT;
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EnableInterrupts();
scic_regs_init(); // Initialize SCI for echoback
scic_fifo_init(); // Initialize the SCI FIFO
while(1)
{
while(!ScicRegs.SCIFFRX.bit.RXFFST ){}
ReceivedChar[j++] = (ScicRegs.SCIRXBUF.bit.RXDT);
for(k=0;k<100;k++);
if(j==10)
{
j=0;
}
}
}
void scic_regs_init()
{
// Note: Clocks were turned on to the SCIA peripheral
// in the InitSysCtrl() function
ScicRegs.SCICCR.bit.rsvd1=0;
ScicRegs.SCICCR.bit.STOPBITS=0; // 1 stop bit
ScicRegs.SCICCR.bit.PARITY=0;
ScicRegs.SCICCR.bit.PARITYENA=0; //no parity
ScicRegs.SCICCR.bit.LOOPBKENA=0; //disable digital loopback
ScicRegs.SCICCR.bit.ADDRIDLE_MODE=0;
ScicRegs.SCICCR.bit.SCICHAR=0x07; //8 bit
ScicRegs.SCICTL1.bit.rsvd=0;
ScicRegs.SCICTL1.bit.rsvd1=0;
ScicRegs.SCICTL1.bit.RXERRINTENA=0; //disable rx interrupt
ScicRegs.SCICTL1.bit.SWRESET=0; // apply sci sw reset
ScicRegs.SCICTL1.bit.TXWAKE=0;
ScicRegs.SCICTL1.bit.SLEEP=0; //sleep mode disabled
ScicRegs.SCICTL1.bit.TXENA=1; //enable tx
ScicRegs.SCICTL1.bit.RXENA=1; // enable rx
ScicRegs.SCICTL2.bit.rsvd=0;
ScicRegs.SCICTL2.bit.rsvd1=0;
ScicRegs.SCICTL2.bit.TXRDY=0;
ScicRegs.SCICTL2.bit.TXEMPTY=0;
ScicRegs.SCICTL2.bit.RXBKINTENA =0;
ScicRegs.SCICTL2.bit.TXINTENA =1;
ScicRegs.SCIHBAUD =0x0000; // 115200 baud @LSPCLK = 37.5MHz.
ScicRegs.SCILBAUD =0x0027;
ScicRegs.SCICTL1.bit.SWRESET=1;// Relinquish SCI from Reset by setting SWRESET =1
ScicRegs.SCIPRI.bit.FREE=0;
ScicRegs.SCIPRI.bit.SOFT=1;
}
void scic_fifo_init()
{
ScicRegs.SCIFFTX.bit.SCIRST=1;
ScicRegs.SCIFFTX.bit.SCIFFENA=1;
ScicRegs.SCIFFTX.bit.TXFIFOXRESET=1;
ScicRegs.SCIFFTX.bit.TXFFST=0;
ScicRegs.SCIFFTX.bit.TXFFINT=0;
ScicRegs.SCIFFTX.bit.TXFFINTCLR=1;
ScicRegs.SCIFFTX.bit.TXFFIENA=0;
ScicRegs.SCIFFTX.bit.TXFFIL=0;
ScicRegs.SCIFFRX.all=0x205f;
ScicRegs.SCIFFCT.all=0x0;
}