Other Parts Discussed in Thread: DRV8305
Hello, I am a total beginner to SPI. I need to communicate with the DRV8305, the datasheet of which states that "Data is always propogated on the rising edge of SCLK" and "Data is always captured on the falling edge of SCLK". It also states "CPOL (clock polarity) = 0 and CPHA (clock phase) = 1". But this doesnt seem to agree with clock polarity and phase according to the F28069 reference manual. It seems to me that I should set Clock Phase to 0 according to the picture below (taken from the F28069 reference manual). Is there anything I am missing here?
