• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 83 subscribers
  • Views 399 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377S: TMS320F28377S: Power On Test using SafeTI library

Dhammika Wijesundera
Intellectual 645 points
Part Number: TMS320F28377S


Hi,

1) I added a power on test based on the SafeTI library provided by you. All my tests pass. I have the following tests.

    Flash Ecc Logic, Flash Crc, HWBIST, PIE, Interrupt Vector Table, Interrupt Vector Mismatch Handling, Watchdog, Int Oscillator2,  Xtal Oscillator, IntOscillator1, Timer0, Timer1, Timer2,

    Memory Ecc Logic, Memory     Parity Logic, Ram, Spi A, Spi B, Sci A.

2) Then I added this to my real code that runs a motor. When I execute the total code, I get a Trip Zone fault. If I disable the Trip Zone, the motor works properly.

3) Then I did a soft reset of all the peripherals after executing the power on test. That routine works because the motor runs (still with the Trip Zone disabled).

Do you know what the issue is?

  • 0
    Intellectual 645 points

    Hi,

    I found that ADC PPB Limit event and ECC Error event are the ones that causes the tripping to occur. Now I do not set up those event triggers in trip-zone registers during the initialization of the software. I initialize them after the PWM interrupts have been enabled. That resolved the issue. 

    I am still interested in knowing why this happen.

    Thanks,

    Dhammika

  • 0 in reply to Dhammika Wijesundera
    TI__Expert 7985 points

    Hi Dhammika, 

    It is good that you were able to get the issue resolved.  We are in the process of identifying the right domain expert to help explain the root cause.  We will get back to you. 

    Regards,

    Krishna

  • 0 in reply to Dhammika Wijesundera
    TI__Guru 54195 points

    The ECC error event makes sense. You're running the flash and RAM ECC logic tests which use the test mode to intentionally inject an error to check that it is properly detected.

    Not sure what the connection would be to the PPB though. Do you know which ADC channel is causing the limit event? Can you monitor it on a scope or something to try to narrow down when/why it's occurring?

    Whitney

  • 0 in reply to Whitney Dewey
    Intellectual 645 points

    Hi Whitney,

    I am not sure in which ADC channel this occurs. 

    The PWM is tripped just after the PWM interrupt is enabled. The PWM interrupt service routine is used to execute the FOC algo. When the PWM is tripped, the motor has not been energized and there is no current in the motor. 

    Thanks,

    Dhammika

  • 0 in reply to Dhammika Wijesundera
    TI__Guru 54195 points

    Can you try taking a look at ADCEVTSTAT and the other ADC registers to try to narrow it down? If you can see which PPB is causing it, is it one you've deliberately configured or is it just the default PPB configuration that happens to be causing the trip?

    Whitney