TMS320F28388D: SPI clock

Scram,

SPI interface on this device can run as fast as 50 MHz.

Are you saying you are not able to get SPI CLK greater than 2 MHz (or) you are not able to get SPI talking to external ADC greater than 2MHz?

Not able to get SPI CLK greater than 2MHz?

SPI Baud rate = LSPCLK / (SPIBRR + 1). LSPCLK is configurable and is function of SYSCLK. So, you need to check SYSCLK, LSPCLK, SPIBRR settings.

1) Make sure SYSCLK is running at 200 MHz. You can easily do this by configuring GPIO73 as CLKOUT pin

GPIO_setPinConfig(GPIO_73_XCLKOUT); //Configure GPIO73 as XCLKOUT pin.

SysCtl_selectClockOutSource(SYSCTL_CLOCKOUT_SYSCLK); //Configure XCLKOUT = SYSCLK

SysCtl_setXClk(SYSCTL_XCLKOUT_DIV_8); //XCLKOUT observed frequency = XCLKOUT / 8

With this code settings, if you observe 25 MHz on GPIO73, then it tells that you SYSCLK is running at 200 MHz.

2) Check the configuration settings of LSPCLK.

ClkCfgRegs.LOSPCP.bit.LSPCLKDIV = ??? (Check whether you're clocking this too low)

3) Check the configuration settings of SPIBRR register

Not able to get SPI talking to external ADC greater than 2MHz?

Source of this problem should be the configuration setting of external ADC and F28388d SPI doesn't have any control over it.

Regards,

Manoj

Hi Manoj

I am not able to get the SPI to do a grater clk than 2 MHz.
My SYSCLK is running at 200 MHz and my LSPCLK is running at 50 MHz.

This is my init for my SPI master which configs the clk for the SPI, with the function: "SPI_setConfig"

When i try to make a clk greaer than 2 MHz it starts to flatten out the clk signal i measure on the GPIO of the SPICLK.

void initSPIBMaster(void)
{
    //
    // Must put SPI into reset before configuring it
    //
    SPI_disableModule(SPIB_BASE);

    //
    // SPI configuration. Use a 1 MHz SPICLK and 16-bit word size.
    //
    SPI_setConfig(SPIB_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL1PHA0, // This it phaseshifted so it trigger on the down going flank.
                  SPI_MODE_MASTER, 2000000, 16);
    SPI_disableLoopback(SPIB_BASE);
    SPI_setEmulationMode(SPIB_BASE, SPI_EMULATION_STOP_AFTER_TRANSMIT);

    //
    // Configuration complete. Enable the module.
    //
    SPI_enableModule(SPIB_BASE);
}

and below you see the setup for my sysclk and more:

//
// Define to pass to SysCtl_setClock(). Will configure the clock as follows:
// PLLSYSCLK = 25MHz (XTAL_OSC) * 32 (IMULT) / (2 (REFDIV) * 2 (ODIV) * 1(SYSDIV))
//
#define DEVICE_SETCLOCK_CFG          (SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(32) | \
                                      SYSCTL_REFDIV(2) | SYSCTL_ODIV(2) | \
                                      SYSCTL_SYSDIV(1) | SYSCTL_PLL_ENABLE | \
                                      SYSCTL_DCC_BASE_1)

//
// 200MHz SYSCLK frequency based on the above DEVICE_SETCLOCK_CFG. Update the
// code below if a different clock configuration is used!
//
#define DEVICE_SYSCLK_FREQ          ((DEVICE_OSCSRC_FREQ * 32) / (2 * 2 * 1))

//
// 50MHz LSPCLK frequency based on the above DEVICE_SYSCLK_FREQ and a default
// low speed peripheral clock divider of 4. Update the code below if a
// different LSPCLK divider is used!
//
#define DEVICE_LSPCLK_FREQ          (DEVICE_SYSCLK_FREQ / 4)

and found theis is hw_spi.h :

//*************************************************************************************************
//
// The following are defines for the bit fields in the SPIBRR register
//
//*************************************************************************************************
#define SPI_BRR_SPI_BIT_RATE_S   0U
#define SPI_BRR_SPI_BIT_RATE_M   0x7FU   // SPI Bit Rate Control
//*************************************************************************************************

hope it helps with understanding my problem

Hi Manoj

Thak´nks this resolved my issue. 

Still have a problem, but this is my own to solve. The PCB i have the controlCARD is put in, needs an adjustment. Because now i am using the SPI on GPIO 26.

Are there any way that i can set the SPI on GPIO 24, 25, 26 and 27 higher than 2 MHz?

Regards 

Asbjørn