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LAUNCHXL-F28379D: AADC Modules monitoring with memory Browser

Part Number: LAUNCHXL-F28379D

I need some help figuring this out; and I appreciate your help.

my goal is to monitor the output of the ADCa and ADCb and ADCc interrupts in the memory browser.

1) I created a 3 buffer variables to monitor the three interrupt of the ADCa ( Adca1Buf, Adca2Buf, and Adca3Buf) 

2) I created a 3 buffer variables to monitor the three interrupt of the ADCb ( Adcb1Buf, Adcb2Buf, and Adcb3Buf) 

3) I created a 3 buffer variables to monitor the three interrupt of the ADCc ( Adcc1Buf, Adcc2Buf, and Adcc3Buf) 

4) used lab6 work bench code as a base, I made sure all the required variables are properly declared, and I was able to get my code to built and debug successfully; However when I start viewing data in the memory browser I got the following issue:

a)with  GPIO18 is connected to AA2 in the LAUNCHXL-F28379D launchpad; Why Adca1Buf is the one changing not Adca2Buf?

b)with PIO18 is connected to AA3 in the LAUNCHXL-F28379D launchpad; Why Adca3Buf is not changing?

c)with PIO18 is connected to AB2 in the LAUNCHXL-F28379D launchpad; Why Acb1Buf and Acc1Buf both are changed? It should be only AdcBufa1 changing.

Thankyouabc.M.zip

  • Hi Mahdi,

    I'm trying to find the right person to help you with your issue. However, that's a bit difficult because your questions are very broad. Can I suggest you narrow your question further? For example, if you have a question about ADC configuration, I would suggest you post a snippet of the ADC code you are using. 

  • Thankyou Gus; 

    what I think is the ADC interrupts functions that I created in the attached DefaultIsr.6c file some works and some do not. and I am not sure why is this happening even though they are all created the same way.

  • Hi,

    Thanks for your question. From a PIE perspective, you must make sure that when you configure each interrupt, they are not repeatedly pre-empting one another. What I mean is that if interrupt 1 has higher priority than interrupt 2, and interrupt 1 keeps triggering (maybe you are using multiple ADC interrupts in the same group/channel), then you will never run interrupt 2 (because interrupt 1 keeps interrupting it). This could be the issue you are seeing.

    For debugging, please try running only one interrupt/ADC at a time. If it works, then the issue is with either: 1) your PIE channel priority not being correct (see "PIE Channel Mapping" in the TRM for learning how to use/debug this), or 2) there is an issue with the ADC Conversion Priority (see "ADC Conversion Priority" section of the TRM for more details on debugging this).

    By stepping through these two chapters of the TRM, you should be able to quickly find which pre-empting source is the issue!

    Regards,

    Vince

  • Vince, thankyou for your help.

    I think the issue I have is when Adca1 interrupt is triggered it will not let Adca2 and Adca3 interrupt from triggering  and the same thing happening for the ADCB interrupts and ADCC interrupts when Adcb1 and Adcc1 interrupts triggers.

    I tried different things such as adding a delay after each interrupt, Clearing  the flag and enable register (IER = 0x0000; & IFR=0x0000) Also clear INT1, INT2 , INT3 overflow flag and clear flags, but I still have the same issue.

    Adca2Buf and Adca3Buf are not showing However Adca1Buf  changes  when pin18 is connected to either one of AA0, AA1,AA2 pins in the launch pad.

    here is The ADCA module Default Isr function:

    /=====================================================================
    // ISRs for PIE vectors x.1 - x.8
    //=====================================================================

    //---------------------------------------------------------------------
    interrupt void ADCA1_ISR(void) // PIE1.1 @ 0x000D40 ADC-A interrupt #1
    {
    static Uint16 *Adca1BufPtr = Adca1Buf; // Pointer to buffer
    static Uint16 iQuadratureTable = 0; // Quadrature table index
    static volatile Uint16 GPIO34_count = 0; // Counter for pin toggle

    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Must acknowledge the PIE group

    //--- Manage the ADC registers
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Clear ADCINT1 flag

    // Check if overflow has occurred
    if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT1)
    {
    AdcaRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag

    }

    //--- Read the ADC result
    *Adca1BufPtr++ = AdcaResultRegs.ADCRESULT0; // Read the result, ADC Result 0. 16-bit ADC result. After the ADC completes a
    //conversion of SOC0, the digital result is placed in this bit field

    //--- Brute-force the circular buffer
    if( Adca1BufPtr == (Adca1Buf + ADC_BUF_LENa1) ) 
    {
    Adca1BufPtr = Adca1Buf; // Rewind the pointer to beginning
    }

    //--- Example: Toggle GPIO18 so we can read it with the ADC ***/
    if(DEBUG_TOGGLE == 1)
    {
    GpioDataRegs.GPATOGGLE.bit.GPIO18 = 1; // Toggle the pin
    }

    //--- Example: Toggle GPIO34 at a 0.5 sec rate (connected to the LED).
    // (1/50000 sec/sample)*(1 samples/int)*(x interrupts/toggle) = (0.5 sec/toggle)
    // ==> x = 25000
    if(GPIO34_count++ > 25000) // Toggle slowly to see the LED blink
    {
    GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1; // Toggle the pin
    GPIO34_count = 0; // Reset the counter
    }

    // Disable CPU interrupts and clear all CPU interrupt flags:
    // IER = 0x0000;
    // IFR = 0x0000;
    EDIS;
    }

    //---------------------------------------------------------------------
    interrupt void ADCA2_ISR(void) // PIE1.1 @ 0x000D40 ADC-A interrupt #1
    {
    static Uint16 *Adca2BufPtr = Adca2Buf; // Pointer to buffer
    static Uint16 iQuadratureTable = 0; // Quadrature table index
    static volatile Uint16 GPIO34_count = 0; // Counter for pin toggle
    //IER = 0x0000;
    //IFR = 0x0000;
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP10; // Must acknowledge the PIE group

    //--- Manage the ADC registers
    //AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Clear ADCINT1 flag
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT2 = 1; // Clear ADCINT2 flag

    // Check if overflow has occurred
    if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT2)
    {
    AdcaRegs.ADCINTOVFCLR.bit.ADCINT2 = 1; //clear INT1 overflow flag
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT2 = 1; //clear INT1 flag
    // IER = 0x0000;
    // IFR = 0x0000;
    }
    //--- Read the ADC result
    *Adca2BufPtr++ = AdcaResultRegs.ADCRESULT2; // Read the result

    //--- Brute-force the circular buffer
    if( Adca2BufPtr == (Adca2Buf + ADC_BUF_LENa2) )
    {
    Adca2BufPtr = Adca2Buf; // Rewind the pointer to beginning
    }
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //IER = 0x0000;
    //IFR = 0x0000;

    EDIS;
    }

    //---------------------------------------------------------------------
    interrupt void ADCA3_ISR(void) // PIE1.1 @ 0x000D40 ADC-A interrupt #1
    {
    static Uint16 *Adca3BufPtr = Adca3Buf; // Pointer to buffer
    static Uint16 iQuadratureTable = 0; // Quadrature table index
    static volatile Uint16 GPIO34_count = 0; // Counter for pin toggle
    //IER = 0x0000;
    // IFR = 0x0000;
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP10; // Must acknowledge the PIE group

    //--- Manage the ADC registers
    // AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Clear ADCINT1 flag
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT3 = 1; // Clear ADCINT3 flag

    // Check if overflow has occurred
    if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT3)
    {
    AdcaRegs.ADCINTOVFCLR.bit.ADCINT3 = 1; //clear INT1 overflow flag
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT3 = 1; //clear INT1 flag
    //IER = 0x0000;
    // IFR = 0x0000;
    }

    //--- Read the ADC result
    *Adca3BufPtr++ = AdcaResultRegs.ADCRESULT2; // Read the result

    //--- Brute-force the circular buffer
    if( Adca3BufPtr == (Adca3Buf + ADC_BUF_LENa3) )
    {
    Adca3BufPtr = Adca3Buf; // Rewind the pointer to beginning
    }
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //IER = 0x0000;
    // IFR = 0x0000;

    EDIS;
    }



  • Hi,

    Please read through the Peripheral Interrupts TRM section regarding prioritization, specifically the "PIE Channel Mapping" table. This table shows that ADCA1, ADCB1, and ADCC1 are all in the same group. ADCA1 has highest priority, so ADCB1 and ADCC1 will be interrupted by ADCA1 any time ADCA1 occurs.

    Please read through the Peripheral Interrupts section of the TRM, and from there I can help provide answers to questions you have about the material.

    Regards,

    Vince