Other Parts Discussed in Thread: C2000WARE
Hi team, I am using TMS320F280040 the application of DCDC converter.
I have inverted the two PWM waveforms ePWM1A and ePWM1B.
Now I want to add some deadband delay between rising edge and falling edge.
I have gone through the example code given by c2000 compiler but I am missing something
I am attaching my code copy, please guide me where I am missing.
EPwm1Regs.TBSTS.all=0; // Time base status register initialization
EPwm1Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTR = 0x0000; // Clear counter
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; //Up-down-count mode
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;//TB_DIV4;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;//TB_DIV4;
EPwm1Regs.TBCTL.bit.FREE_SOFT=0;
EPwm1Regs.TBPRD = 500;//PWM_PERIOD_VALUE ; // Set timer period 801 TBCLKs
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;//CC_LD_DISABLE; //Forbidden shadow register A loading
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;//CC_LD_DISABLE; // Forbidden shadow register B loading
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;//CC_IMMEDIATE; //CMPA loads immediately
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;//CC_IMMEDIATE; //CMPB loads immediately
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on Zero
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.DBCTL.bit.DEDB_MODE = DB_FULL_ENABLE; // enable Dead-band module
//EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;//DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm1Regs.DBFED.bit.DBFED = EPWM1_FED_DB;
EPwm1Regs.DBRED.bit.DBRED = EPWM1_RED_DB;
//for 20% duty cycle
EPwm1Regs.CMPA.bit.CMPA=100;//PWM_PERIOD_VALUE/2;//50%DUTYCYCLE // 4us off, 16us on
EPwm1Regs.CMPB.bit.CMPB=400;//PWM_PERIOD_VALUE/2; // 4us on, 16us off
// EPwm1Regs.AQCTLB.bit.CBU = AQ_SET; // Set PWM1A on Zero
// EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Set PWM1A on Zero
EPwm1Regs.AQCTLB.bit.CAD = AQ_SET;
EPwm1Regs.AQSFRC.all=0; //Action forced register clear 0
EPwm1Regs.AQCSFRC.all = 0;
Thanks
Pratik