TMS320F28379D: External DAC Interfacing

Ganeshapandi K,

The EMIF on C2000 supports the industry-standard SDRAM and asynchronous SRAM memory interfaces.  The protocols are rigid and the details are typically abstracted away when interfacing the EMIF with a compatible component.  Does your intended DAC support one of these interfaces?  If not, I would not recommend using EMIF.

You can find more details about EMIF in this appnote and in the TRM.

-Tommy

1. Thank you Tommy. My external 12 bit DAC has the following pin features for the interface

1. Chip Select Pin   -----> I am giving Chip selection signal from "EM1CS3" Pin of Tms320f28379D

2. Read/Write Pin   ----->  I am giving Chip selection signal from "EM1WE" Pin of Tms320f28379D

In TRM the EMIF interface tells details on SDRAM and Asynchronous Memory interface. If there is so much of constraints in interfacing DAC with the help of EMIF. Is the any other way for interfacing external 12 bit DAC with TMS320f28379D? 

2. From your reply I understood that My DAC pin specifications should meet up similar to EMIF asynchronous memory device as shown below. For example in IS61WV25616EDBLL datasheet, there is "lower and upper byte pin" and "Output Enable pin"  Hence Does my DAC also need to have those pins? Do you mean to say such kind of matching protocols?

3. EMIF interfacing works only for 8/16 and 32bit device?

Kindly help on this. Once again Thank you Tommy for the great support from TI.

Ganeshapandi K said:

In TRM the EMIF interface tells details on SDRAM and Asynchronous Memory interface. If there is so much of constraints in interfacing DAC with the help of EMIF. Is the any other way for interfacing external 12 bit DAC with TMS320f28379D?

The fallback method would be to use GPIO, which is the most flexible for generating arbitrary IO activity.

Ganeshapandi K said:

Does my DAC also need to have those pins? Do you mean to say such kind of matching protocols?

For the highest level of compatibility and ease of design, there should be a one-to-one match of signals between the EMIF and target device.  However, the EMIF is a bus controller that generates mostly output signals so whether your target uses those signals or not is inconsequential to the EMIF.

I recommend reviewing the first chapter of the EMIF appnote for a simplified view (~1-page) of how the asynchronous interface works to see if you would be able to adapt the behavior to your DAC.  I seriously doubt that the DAC would have an SDRAM-compatible interface.

Ganeshapandi K said:

3. EMIF interfacing works only for 8/16 and 32bit device?

Correct.  But as mentioned above, the DAC can ignore EMIF signals.