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TMS320F28388D: SPI communication problem (SIMO 0 output during delay) Question.

Part Number: TMS320F28388D


Hello everyone.

I have an SPI question.

I am using 28388D and I control LED with SPI-B.

In the existing NXP processor, the following waveform could be seen (Processor -> LED 2wire Communication: SIMO, CLK)

(Green : SPI-B SIMO, Yellow : SPI-B CLK)

In NXP Processor, CLK and SIMO are changed to standby state during delay after 1 byte transmission.

Next is the 28388D waveform.

A delay was given to make CLK wait after 1 byte transmission.
Unlike NXP, SIMO keeps at zero.

How do I change the 28388D to be like an NXP?

SPI-B Initialize Code down below

    SPI_disableModule(SPIB_BASE);

    SPI_setConfig(SPIB_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,
                  SPI_MODE_MASTER, 500000, 8);
    SPI_setEmulationMode(SPIB_BASE, SPI_EMULATION_STOP_AFTER_TRANSMIT);
    SPI_enableFIFO(SPIB_BASE);
    SPI_setTxFifoTransmitDelay(SPIB_BASE, 1);
     SPI_enableModule(SPIB_BASE);

Thank you for answer. :)

  • The image is missing.

    NXP Processor Waveform 

    28388D Waveform

  • Kwon,

    In SPI master mode, MOSI pin is controlled by the status of TALK bit (SPICTL.TALK = 1) and what last bit was transmitted on MOSI pin.

    When SPI Master + TALK = 1, the status of MOSI pin depends on the last bit transmitted on MOSI pin.

    If SPI master had transmitted last bit as 0, it will continue to hold MOSI pin in that state. Only way to flip this MOSI pin to HIGH state (provided you had pull-up enabled) is when TALK bit is cleared. Please read SPICTL.TALK bit for details.

    Regards,

    Manoj