Hello,
I’m using the C2000 DIMM Experimenter’s kit with the TMS320F28335 microcontroller.
I want to create 6-PWM signals phase shifted to each other. In particular:
- PWM 1 is the master for the synchronization
- PWM 2 is shifted by 120° respect PWM 1
- PWM 3 is shifted by 240° respect PWM 1
- PWM 4 is in phase to PWM1+gui_phase_shift
- PWM 5 is shifted by 120° respect PWM 4
- PWM 6 is shifted by 240° respect PWM 4
Where gui_phase_shift can vary in range [0°, 90°] or in range [270°, 360°].
When gui_phase_shift is the range [270°, 360°], I can’t get any PWM signal from the PWM4 module. It’s seem that the maximum value allowed is for 268°: for higher degrees there’s no signal.
How can I solve this problem?
Here there are the initialization for PWM1 and PWM4 module:
void init_pwm1 (void)
{
/* TBPDR = 1/2* freq_sysclkout / (freq_pwm * CLKDIV * HSPCLKDIV) */
EPwm1Regs.TBPRD = 536u; /* PWM Period = 140kHz */
EPwm1Regs.TBCTL.all = 0x0000u;
EPwm1Regs.TBCTL.bit.FREE_SOFT = 3u;
EPwm1Regs.TBCTL.bit.CTRMODE = 2u;
EPwm1Regs.TBCTL.bit.PRDLD = 1u;
/* TBCLK = SYSCLKOUT/(HSPCLKDIV *CLKDIV) */
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0x000u;
EPwm1Regs.TBCTL.bit.CLKDIV = 0x000u;
/* Phase-shift configuration */
/* (TBPHS / TBPRD) * 360° = (phase_shift)° */
EPwm1Regs.TBPHS.half.TBPHS = 0x0000u;
EPwm1Regs.TBCTL.bit.PHSEN = 0u;
EPwm1Regs.TBCTL.bit.SYNCOSEL = 1u;
EPwm1Regs.AQCTLA.all = 0x0000u;
EPwm1Regs.AQCTLA.bit.CAU = 1u;
EPwm1Regs.AQCTLA.bit.CAD = 2u;
EPwm1Regs.DBCTL.bit.OUT_MODE = 3u;
EPwm1Regs.DBCTL.bit.POLSEL = 2u;
EPwm1Regs.DBFED = 50u;
EPwm1Regs.DBRED = 50u;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = 1u;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = 1u;
EPwm1Regs.CMPA.half.CMPA = EPwm1Regs.TBPRD/2;
EALLOW;
EPwm1Regs.TZCTL.bit.TZA = 2u;
EPwm1Regs.TZCTL.bit.TZB = 2u;
EDIS;
}
void init_pwm4 (void)
{
/* TBPDR = 1/2* freq_sysclkout / (freq_pwm * CLKDIV * HSPCLKDIV) */
EPwm4Regs.TBPRD = 536u; /* PWM Period = 140kHz */
EPwm4Regs.TBCTL.all = 0x0000u;
EPwm4Regs.TBCTL.bit.FREE_SOFT = 3u;
EPwm4Regs.TBCTL.bit.CTRMODE = 2u;
EPwm4Regs.TBCTL.bit.PRDLD = 1u;
/* TBCLK = SYSCLKOUT/(HSPCLKDIV *CLKDIV) */
EPwm4Regs.TBCTL.bit.HSPCLKDIV = 0x000u;
EPwm4Regs.TBCTL.bit.CLKDIV = 0x000u;
/* Phase-shift configuration */
/* (TBPHS / TBPRD) * 360° = (phase_shift)° */
EPwm4Regs.TBPHS.half.TBPHS = gui_phase_shift;
EPwm4Regs.TBCTL.bit.PHSEN = 1u
EPwm4Regs.TBCTL.bit.PHSDIR = 0u;
EPwm4Regs.TBCTL.bit.SYNCOSEL = 1u;
EPwm4Regs.AQCTLA.all = 0x0000u;
EPwm4Regs.AQCTLA.bit.CAU = 1u;
EPwm4Regs.AQCTLA.bit.CAD = 2u;
EPwm4Regs.DBCTL.bit.OUT_MODE = 3u;
EPwm4Regs.DBCTL.bit.POLSEL = 2u;
EPwm4Regs.DBFED = 50u;
EPwm4Regs.DBRED = 50u;
EPwm4Regs.CMPCTL.bit.SHDWAMODE = 1u;
EPwm4Regs.CMPCTL.bit.SHDWBMODE = 1u;
EPwm4Regs.CMPA.half.CMPA = EPwm4Regs.TBPRD/2;
EALLOW;
EPwm4Regs.TZCTL.bit.TZA = 2u;
EPwm4Regs.TZCTL.bit.TZB = 2u;
EDIS;
}