TMS320F28379D: Ask about InitSysCtrl() function

Hi all,

I am following an example from TI library at C:\ti\c2000\C2000Ware_3_04_00_00\device_support\f2837xd\examples\cpu1\epwm_deadband\cpu01. I have several questions below:

(1) I have one question about InitSysCtrl(). In the InitSysCtrl function, there is one part like below:

if(imult != ClkCfgRegs.SYSPLLMULT.bit.IMULT ||
fmult != ClkCfgRegs.SYSPLLMULT.bit.FMULT)
{
Uint16 i;

//
// This bit is reset only by POR
//
if(DevCfgRegs.SYSDBGCTL.bit.BIT_0 == 1)
{
//
// The user can optionally insert handler code here. This will only
// be executed if a watchdog reset occurred after a failed system
// PLL initialization. See your device user's guide for more
// information.
//
// If the application has a watchdog reset handler, this bit should
// be checked to determine if the watchdog reset occurred because
// of the PLL.
//
// No action here will continue with retrying the PLL as normal.
//
// Failed PLL initialization is due to any of the following:
// - No PLL clock
// - SLIP condition
// - Wrong Frequency
//
}

//
// Bypass PLL and set dividers to /1
//
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 0;

//
// Delay of at least 120 OSCCLK cycles required post PLL bypass
//
asm(" RPT #120 || NOP");
ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV = 0;

//
// Lock the PLL five times. This helps ensure a successful start.
// Five is the minimum recommended number. The user can increase this
// number according to allotted system initialization time.
//
for(i = 0; i < 5; i++)
{
//
// Turn off PLL
//
ClkCfgRegs.SYSPLLCTL1.bit.PLLEN = 0; // Disable PLL
asm(" RPT #20 || NOP");

//
// Write multiplier, which automatically turns on the PLL
//
ClkCfgRegs.SYSPLLMULT.all = ((fmult << 8U) | imult);

//
// Wait for the SYSPLL lock counter
//
while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1) // System PLL status register.
// bit.LOCKS = 0 = SYSPLL is not yet locked
// bit.LOCKS = 1 = SYSPLL is locked
{
//
// Uncomment to service the watchdog
//
// ServiceDog();
}
}
}

My question is:

Can you let me know the purpose of this code section? As I understand, if variables imult and fmult are different from the current bit value, CCS will proceed with this code.

And because the current bit values are different from imult and fmult, we should enable SYSPLLCTL1 register and setup these bit values.

But the code above disables the SYSPLLCTL1 register at ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 0. Do you understand why?

(2) My second question lies in the code below: 

#ifdef _LAUNCHXL_F28379D
InitSysPll(XTAL_OSC,IMULT_40,FMULT_0,PLLCLK_BY_2);
#else
InitSysPll(XTAL_OSC, IMULT_20, FMULT_0, PLLCLK_BY_2);
#endif // _LAUNCHXL_F28379D

What is the value of _LAUNCHXL_F28379D variable? Does the code above ask if the hardware is LaunchPad or ControlCard of F28379D?

And how the program can differentiate between LaunchPad and ControlCard? I tried the code with both these hardware and they are worked (but output frequency is different!)

(3) My third question is: In the example at  C:\ti\c2000\C2000Ware_3_04_00_00\device_support\f2837xd\examples\cpu1\epwm_deadband\cpu01.

I did not find where people set these bit field in InitSysCtrl() function: ClkCfgRegsSYSPLLMULT.bit.IMULT and  ClkCfgRegs.SYSPLLMULT.bit.FMULT

I am a newbie to C2000 MCU. Please help me! Thanks.