Other Parts Discussed in Thread: C2000WARE
Dear TI team,
In order to make complementary signals using ePWM modules, I used and modified the code section (from: C:\ti\c2000\C2000Ware_3_04_00_00\device_support\f2837xd\examples\cpu1\epwm_deadband\cpu01)
EPwm1Regs.TBPRD = 1000; // Set timer period
EPwm1Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTR = 0x0000;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;//TB_COUNT_UP; // Counting mode
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading. #define TB_DISABLE 0x0
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //TB_DIV1 = 0x0 -> Dividing for 1
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1; //TB_DIV1 = 0x0 -> Dividing for 1
//EPwm1Regs.PERCLKDIVSEL.bit.EPWMCLKDIV =
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
//
// Setup compare
//
EPwm1Regs.CMPA.bit.CMPA = 750;
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Set EPWMxA high
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Set EPWMxA low
// AQCTLB: Action Qualifier Control Register For Output B
EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Set EPWMxB low
EPwm1Regs.AQCTLB.bit.CAD = AQ_SET; // Set EPWMxB high
From the code section above, the EPWM1A and EPWM1B output signals should be complementary, is it correct? However, on my oscilloscope, the two signals are identical.
My questions are:
(1) Is there any wrong with my code or my setup?
(2) What is the purpose of shadowing registers in the code below:
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
Thank you very much for your help. Because I am a newbie to C2000, your guidance is very meaningful to me.
Regards,