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TMS320F28379D: Reading the SPI input pin through DMA

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Hello all,

I have periodic interrupt in my code which needs to read the angle provided by the encoder through the SPI input pin. However, I want to do this via DMA access to the SPI registers. I want the data to be inputted from the SPI pin and continually be transferred through DMA regardless of my periodic interrupt. Then, each time I prefer inside the interrupt, the code gets access to the latest data (angle) that has been transferred through DMA.

Would someone please let me know what configuration I should use for DMA? e.g., Should I enable the DMA interrupt? Should I use the continuous mode?

Regards.

  • Hi Jake,

    If you only want to access the data in your current periodic interrupt then you shouldn't need to configure the DMA interrupt. This is only done in applications that want to do processing as soon as a set amount of data has been transferred or received. Continuous mode will probably be the most fitting for what you are trying to accomplish.

    I would suggest looking at the SPI DMA example we have in C2000 as well to help you set this up:

    C:\ti\c2000\C2000Ware_version\device_support\f2837xd\examples\cpu1\spi_loopback_dma

     

    Best Regards,

    Marlyn

  • Hi Marlyn,

    Thank you for the reply. During these days, I have tested my code with SPI DMA without interrupt enabled. 

    I have some question about "spi_loopback_dma_cpu01" example:

    - Why in this example TXFFIL is configured to be 8 while SPI interrupt is disabled? 

    SpiaRegs.SPIFFTX.bit.TXFFIL = FIFO_LVL;  // Set TX FIFO level

    - Why the burst size should be less than 8 ?

    #define BURST         (FIFO_LVL-1)    // burst size should be less than 8

    regards.

  • Hi Jake,

    Why in this example TXFFIL is configured to be 8 while SPI interrupt is disabled? 

    The SPI must have FIFO enhancements enabled in order for the DMA triggers to be generated. 

    Why the burst size should be less than 8 ?

    When using the DMA with the TX FIFO, the DMA Burst Size (DMA_BURST_SIZE) should be no greater than 16 – TXFFIL (in this case 8) in order to prevent the DMA from writing to an already full FIFO. This will lead to data loss and is not recommended.

    Best Regards,

    Marlyn

  • Marlyn,

    Thanks for the reply.

    The SPI must have FIFO enhancements enabled in order for the DM

    I know that the FIFO should be enabled. However, I don't know why although the interrupt is disabled, the TXFFIL is configured to be 8?

    SpiaRegs.SPIFFTX.bit.TXFFIL = FIFO_LVL;  // Set TX FIFO level

    Regards

  • Hi Jake,

    The DMA events are controlled by configuring the SPIFFTX.TXFFIL and SPIFFRX.RXFFIL bits. SPITXDMA activates when TXFFST is less than the interrupt level (TXFFIL). That is why even though the SPI interrupts themselves are disabled it is necessary to set the TX FIFO level.

    As to why it is configured for 8, the example is set up to send and receive 128 words.

    Choosing a TXFILL of 8 makes it simple to calculate a DMA transfer size and burst size given the word count for the example. The snippet below can be found in the 'Transmitting Data Using SPI with DMA' section of the Technical reference manual.

    NUM_WORDS: 128

    TXFFIL: 8

    DMA_TRANSFER_SIZE: (NUM_WORDS /TXFFIL) – 1 = (128/8) – 1 = 15 (16 transfers)

    DMA_BURST_SIZE: (16 – TXFFIL) – 1 = (16 – 8) – 1 = 7 (8 words per burst)

    Best Regards,

    Marlyn