This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28379D: Local sharing memory problem

Part Number: TMS320F28379D

Hi,

My array size was unsigned int uiArry[1280];  I am facing issue menetioned below, can anyone resolve this

I observed LS5 address in .cmd file RAMLS5      : origin = 0x00A800, length = 0x000800

From above length array size limited to 1024, but my arry could not have a chance to get down from 1280

"../2837x_FLASH_lnk_cpu1.cmd", line 100: error #10099-D: program will not fit into available memory, or the section contains a call site that requires a trampoline that can't be generated for this section. run placement with alignment/blocking fails for section ".ebss" size 0x2540page 1.  Available memory ranges:
   RAMLS5       size: 0x800        unused: 0x0          max hole: 0x0       
   RAMGS0       size: 0x1000       unused: 0x6eb        max hole: 0x6eb     
   RAMGS1       size: 0x1000       unused: 0x1000       max hole: 0x1000

  • Thanks for reaching out to the E2E forum, I believe this issue is caused because even if multiple RAM blocks are assigned to a common link target(like .text) the linker cannot span multiple blocks for a single function or in this case an array.

    Since your array is bigger than the size of LS5, we will need to give the linker a directive on where to place it so it doesn't exceed the native block size, such as a GS# memory.  We will use the #pragma DATA_SECTION to force the array to a specific memory

    You can look at some example code that shows the syntax here

    Best,
    Matthew

  • Hi Matthew ,

    I think so this resolve for a moment as because the fault of mine using array size to 1024, But then i have changed and checked again with array size of 1280 with #pragma DATA_SECTION , still remains the problem same.

    Regards,

    Rajesh.

  • Rajesh,

    I believe I failed to notice that there are 2 errors in the linker output you posted.

    The one concerning the array is related to the .ebss comment.  This is what we addressed.

    There is another error related to the size of your main program itself, that is allocated to the .text section.  I would look to see what memories you have allocated for .text in the linker.  If you prefer you can attach a copy of your .cmd file and I can take a look. 

    Even if you have combined multiple SRAMs using a "|" operator the restriction on a singular function crossing defined blocks still exists.  We can change the definition for contiguous regions to define them as one block so the linker won't throw this error.

    Best,
    Matthew

  • MEMORY
    {
    PAGE 0 :  /* Program Memory */
              /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
              /* BEGIN is used for the "boot to Flash" bootloader mode   */
    
       BEGIN           	: origin = 0x080000, length = 0x000002
       RAMM0           	: origin = 0x000122, length = 0x0002DE
       RAMD0           	: origin = 0x00B000, length = 0x000800
       RAMLS0          	: origin = 0x008000, length = 0x000800
       RAMLS1          	: origin = 0x008800, length = 0x000800
       RAMLS2      		: origin = 0x009000, length = 0x000800
       RAMLS3      		: origin = 0x009800, length = 0x000800
       RAMLS4      		: origin = 0x00A000, length = 0x000800
       RAMGS14          : origin = 0x01A000, length = 0x001000
       RAMGS15          : origin = 0x01B000, length = 0x001000
       RESET           	: origin = 0x3FFFC0, length = 0x000002
       
       /* Flash sectors */
       FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
       FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
       FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
       FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
       FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
       FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
       FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
       FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
       FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
       FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
       FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
       FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
       FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
       FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */   
    
    PAGE 1 : /* Data Memory */
             /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
    
       BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
       RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
       RAMD1           : origin = 0x00B800, length = 0x000800
    
       RAMLS5      : origin = 0x00A800, length = 0x000800
    
       RAMGS0      : origin = 0x00C000, length = 0x001000
       RAMGS1      : origin = 0x00D000, length = 0x001000
       RAMGS2      : origin = 0x00E000, length = 0x001000
       RAMGS3      : origin = 0x00F000, length = 0x001000
       RAMGS4      : origin = 0x010000, length = 0x001000
       RAMGS5      : origin = 0x011000, length = 0x001000
       RAMGS6      : origin = 0x012000, length = 0x001000
       RAMGS7      : origin = 0x013000, length = 0x001000
       RAMGS8      : origin = 0x014000, length = 0x001000
       RAMGS9      : origin = 0x015000, length = 0x001000
       RAMGS10     : origin = 0x016000, length = 0x001000
       RAMGS11     : origin = 0x017000, length = 0x001000
       RAMGS12     : origin = 0x018000, length = 0x001000
       RAMGS13     : origin = 0x019000, length = 0x001000
    
       
       CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
       CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
    }
    
    
    SECTIONS
    {
       /* Allocate program areas: */
       .cinit              : > FLASHB      PAGE = 0, ALIGN(4)
       .pinit              : > FLASHB,     PAGE = 0, ALIGN(4)
       .text               : >> FLASHB | FLASHC | FLASHD | FLASHE      PAGE = 0, ALIGN(4)
       codestart           : > BEGIN       PAGE = 0, ALIGN(4)
    
    #ifdef __TI_COMPILER_VERSION__
       #if __TI_COMPILER_VERSION__ >= 15009000
        .TI.ramfunc : {} LOAD = FLASHD,
                             RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                             LOAD_START(_RamfuncsLoadStart),
                             LOAD_SIZE(_RamfuncsLoadSize),
                             LOAD_END(_RamfuncsLoadEnd),
                             RUN_START(_RamfuncsRunStart),
                             RUN_SIZE(_RamfuncsRunSize),
                             RUN_END(_RamfuncsRunEnd),
                             PAGE = 0, ALIGN(4)
       #else
       ramfuncs            : LOAD = FLASHD,
                             RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                             LOAD_START(_RamfuncsLoadStart),
                             LOAD_SIZE(_RamfuncsLoadSize),
                             LOAD_END(_RamfuncsLoadEnd),
                             RUN_START(_RamfuncsRunStart),
                             RUN_SIZE(_RamfuncsRunSize),
                             RUN_END(_RamfuncsRunEnd),
                             PAGE = 0, ALIGN(4)   
       #endif
    #endif
    						 
       /* Allocate uninitalized data sections: */
       .stack              : > RAMM1        PAGE = 1
       .ebss               : >> RAMLS5 | RAMGS0 | RAMGS1       PAGE = 1
       .esysmem            : > RAMLS5       PAGE = 1
    
       /* Initalized sections go in Flash */
       .econst             : >> FLASHF | FLASHG | FLASHH      PAGE = 0, ALIGN(4)
       .switch             : > FLASHB      PAGE = 0, ALIGN(4)
       
       .reset              : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
    
       Filter_RegsFile     : > RAMGS0,	   PAGE = 1
       
       SHARERAMGS0		: > RAMGS0,		PAGE = 1
       SHARERAMGS1		: > RAMGS1,		PAGE = 1
       
       /* The following section definitions are required when using the IPC API Drivers */ 
        GROUP : > CPU1TOCPU2RAM, PAGE = 1 
        {
            PUTBUFFER 
            PUTWRITEIDX 
            GETREADIDX 
        }
        
        GROUP : > CPU2TOCPU1RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
        }  
        
    }
    
    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */
    

    Dear matthew,

    Thank you for support, please find the attached text document(.cmd)

    Regards,

    Rajesh.

  • Rajesh,

    Try the below change

    line 70   .text  : >> FLASHE | FLASHF  PAGE = 0, ALIGN(4)

    line 103 .econst : >> FLASHG | FLASHH | FLASHI  PAGE = 0, ALIGN(4)

    This should give the .text the same amount of flash, but give it in larger blocks.  I've re-allocated the .econst accordingly.

    Best,

    Matthew