• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 81 subscribers
  • Views 493 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ECAP interrupt and flag register settings

Subha R
Intellectual 295 points

Part Number: TMS320F28388D

Hi,

I use ecap module to measure motor speed with ecap 5 module.

I configure the register settings with respect to my application.

PIE interrupts and ecap 5 interrupt is enabled and global interrupt bit INT is 0, clock and CPU selections are configured before. 

The interrupt occurs on ECEINT.bit.CEVT4 but the corresponding flag bit is not set(ECFLG.bit.CEVT4) so the capture registers CAP1, CAP2, CAP3, CAP4 reads 0. 

Why that happens so ?

Does overflow affect the above functionality?

Thanks,

Subha