TMS320F28388D: How to configure SPI in CPU2

Hi, sir.

I'm using tms320f28388D custom board.

I have been implementing DFU using external flash memory integrated in my custom board.

Currently, I stored and read the CPU1 boot image using SPI communication from external flash memory and successfully booted from CPU1.

In the same way, I try to store and read CPU2 image from external flash memory in the CPU2 using SPI.

So I set it up like this:

---------------------------------------------------------------------------------------------------------------------------------

[CPU1]

Device_init();
Device_initGPIO();

//GPIO setting

GPIO_setPinConfig(GPIO_16_GPIO16);//GPIO16 -> FLASH_WP
GPIO_setPinConfig(GPIO_57_GPIO57);//GPIO57 -> FLASH_CS
GPIO_setPinConfig(GPIO_54_SPIA_SIMO);-> FLASH_SIMO
GPIO_setPinConfig(GPIO_55_SPIA_SOMI);-> FLASH_SOMI
GPIO_setPinConfig(GPIO_56_SPIA_CLK);-> FLASH_CLK

GPIO_setDirectionMode(FLASH_WP, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(FLASH_WP, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(FLASH_WP, GPIO_QUAL_SYNC);

GPIO_setDirectionMode(FLASH_CS, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(FLASH_CS, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(FLASH_CS, GPIO_QUAL_SYNC);

GPIO_setDirectionMode(100, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(100, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(100, GPIO_QUAL_SYNC);

GPIO_setMasterCore(16, GPIO_CORE_CPU2);//WP
GPIO_setMasterCore(57, GPIO_CORE_CPU2);//CS
GPIO_setMasterCore(54, GPIO_CORE_CPU2);//SIMO
GPIO_setMasterCore(55, GPIO_CORE_CPU2);//SOMI
GPIO_setMasterCore(56, GPIO_CORE_CPU2);//CLK

GPIO_setMasterCore(100, GPIO_CORE_CPU2);//CPU2 boot check gpio

GPIO_writePin(FLASH_WP, 1);//HIGH
GPIO_writePin(FLASH_CS, 1);//HIGH

//SPI setting

SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL6_SPI, 1, SYSCTL_CPUSEL_CPU2);

SPI_disableModule(SPIA_BASE);
SPI_setConfig(SPIA_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA1, SPI_MODE_MASTER, 1000000, 8);
SPI_disableFIFO(SPIA_BASE);
SPI_disableLoopback(SPIA_BASE);
SPI_setEmulationMode(SPIA_BASE, SPI_EMULATION_STOP_MIDWAY);
SPI_enableModule(SPIA_BASE);

// Boot to CPU2

Device_bootCPU2(BOOTMODE_BOOT_TO_FLASH_SECTOR0);

//CPU2 check

while(GPIO_readPin(100) == 0);

while(1)

{

      ...
}

[CPU2]

Device_init();

CS_LOW;
SPI_writeDataBlockingNonFIFO(SPIA_BASE, WREN);
SPI_readDataBlockingNonFIFO(SPIA_BASE); -> stopped.
CS_HIGH;

GPIO_writePin(100,1);

while(1)

{

      ...
}

 ---------------------------------------------------------------------------------------------------------------------------------

The problem is that the GPIO setting is fine, but it freezes when getting data using SPI communication from CPU2.

I wonder what I was wrong. There seemed to be no way of using CPU2's SPI in TRM or c2000ware.

Could I use SPI on CPU2? If so, How should I configure the SPI?

Thank you.