TMS320F28388D: TMDSCNCD28388D: EtherCAT PHY clock

Dear E2E Support Expert,

We are using TMS320F28388D for EtherCAT communication.

When using the debugger, the PHY Clock is output at 25Mhz according to the settings below.

But when I do not use the debugger and use it as FLASH memory, it often outputs 50Mhz and I can't do EtherCAT communication.

Thanks and Best Regards,

HJ.

main()

{

...

Device_bootCPU2(BOOTMODE_BOOT_TO_FLASH);
configureAndReleaseCMToWait();
SysCtl_setECatClk(SYSCTL_ECATCLKOUT_DIV_2, SYSCTL_SOURCE_SYSPLL, ESC_USE_INT_PHY_CLK); //PLLSYSCLK = 200MHz, ECatCLK = 100MHz
releaseCMToApplication();

...

}

configureAndReleaseCMToWait(void)
{
SysCtl_setCMClk(SYSCTL_CMCLKOUT_DIV_1, SYSCTL_SOURCE_AUXPLL); //AUXPLLCLK = 120MHz, CMCLK = 120MHz
IPC_setBootMode(IPC_CPU1_L_CM_R, (BOOT_KEY | CM_BOOT_FREQ_120MHZ | BOOTMODE_BOOT_TO_WAIT));
IPC_setFlagLtoR(IPC_CPU1_L_CM_R, IPC_FLAG0);
SysCtl_controlCMReset(SYSCTL_CORE_DEACTIVE);
}

releaseCMToApplication(void)
{
IPC_setBootMode(IPC_CPU1_L_CM_R, (BOOT_KEY | CM_BOOT_FREQ_120MHZ | BOOTMODE_BOOT_TO_FLASH));
IPC_setFlagLtoR(IPC_CPU1_L_CM_R, IPC_FLAG0);
}