Part Number: SM320F28335-EP
Other Parts Discussed in Thread: TMS320F28335
Hello TI technical team,
After releasing the XRS line to High logic, the microcontroller boots the first Software sequences, while I assume all GPIOs will be initialized as Hi-Z, until SW defines the proper state for them.
Quiestion1: Does all GPIOs have both Pull-Up and Pull-Down enabling possibility?
Quiestion2: How long it takes to have the proper pull-up/down SW settings in place after XRS was released?
Quiestion3: Can we avoid an uncontrolled High Level during GPIO80 initialization?
Quiestion4: Are there any differences, related to GPIO initialization, compared to TMS320F28335
We are investigating the GPIO80 initialization sequence, that is responsible for an external RESET(active high) for another device. With no external Pull-Up/Down resistors, we observed, a logic HIGH level, for about ~35ms.
Before adding an External Pull-Down resistor, I would like to understand the impact with the internal active Pull-Up/Down circuits, during the start-up sequence.
Thank You for your support!