Hi Champs,
In SCI communication, is it possible to establish reception processing without using reception interrupts?
The baud rate of the communication is 38400bps, and I want to perform reception processing every 1ms.
(Each time, a message of about 10 bytes is sent.)
If it is every 1ms, it will receive 3 bytes to 4 bytes.
Therefore, I would like to use a FIFO to check to what depth the FIFO has received the data and store the data in a buffer.
However, there are some concerns.
For example, suppose there are 3 bytes of data in FIFO0-FIFO2 at the timing of the 1ms reception process.
Suppose we check RXFFST=3 in the SCIFFRX register and store the data in FIFO0-FIFO2 in the buffer.
Is there a possibility that the next data is received during this process, and the data is stored in FIFO3?
Thank you very much for help.
Best regards,
Yuka