TMS320F280049C: Using LaunchpadXL, with drvSPI8320RS board. Question on dead time.

Part Number: TMS320F280049C

DBFED and DBRED are being set to 1. 

half-cycle clocking is disabled.

Therefore the dead band is 0.01 μS according to the table 18-10 in the reference guide, sprui33d.

This means 10 ns is the dead time. Right?

Hi Akila,

I have merged your threads as both questions you asked are related to the same topic.

Regards,

Vince

Hi AKila,

See the code below. DRV8320_DEADTIME_100_NS is predefined value to specify the dead time as shown below.

typedef enum
{
    DRV8320_DEADTIME_50_NS  = (0 << 8),   //!< DEAD_TIME = 50ns
    DRV8320_DEADTIME_100_NS = (1 << 8),   //!< DEAD_TIME = 100ns
    DRV8320_DEADTIME_200_NS = (2 << 8),   //!< DEAD_TIME = 200ns
    DRV8320_DEADTIME_400_NS = (3 << 8)    //!< DEAD_TIME = 400ns
} DRV8320_CTRL05_DeadTime_e;

and the control register directly reads this value and set the dead band in main.

typedef struct _DRV8320_Ctrl05_t_
{
    DRV8320_CTRL05_VDSLVL_e           VDS_LVL;        // Bits 3-0
    DRV8320_CTRL05_OcpDeg_e           OCP_DEG;        // Bits 5-4
    DRV8320_CTRL05_OcpMode_e          OCP_MODE;       // Bits 7-5
    DRV8320_CTRL05_DeadTime_e         DEAD_TIME;      // Bits 9-8
    bool                              TRETRY;         // Bits 10
}DRV8320_Ctrl05_t;

//! \brief Object for the DRV8320 registers and commands
//!
typedef struct _DRV8320_SPIVars_t_
{
    DRV8320_Stat00_t          Stat_Reg_00;
    DRV8320_Stat01_t          Stat_Reg_01;

    DRV8320_Ctrl02_t          Ctrl_Reg_02;
    DRV8320_Ctrl03_t          Ctrl_Reg_03;
    DRV8320_Ctrl04_t          Ctrl_Reg_04;
    DRV8320_Ctrl05_t          Ctrl_Reg_05;
    bool                      writeCmd;
    bool                      readCmd;

    uint16_t                  manWriteAddr;
    uint16_t                  manReadAddr;
    uint16_t                  manWriteData;
    uint16_t                  manReadData;
    bool                      manWriteCmd;
    bool                      manReadCmd;
}DRV8320_SPIVars_t;

Best,

John

In my mind these are two different questions. I still do not understand where and how the hardware register, DBCTL, gets updated. The code you quoted simply shows the value being passed to and from main to the driver board. Where does it update the actual DBCTL register value to reflect 100ns?

Could you please answer this question. Thanks.

"

DBFED and DBRED are being set to 1. 

half-cycle clocking is disabled.

Therefore the dead band is 0.01 μS according to the table 18-10 in the reference guide, sprui33d.

This means 10 ns is the dead time. Right?

"

How does the DRV8320RS driver set the dead time? Can you show me the code that does that?

Does HAL_writeDRVData update the DBCTL register? If not, how does the processor know the dead time? Can you explain how it works please?

Thanks for your response. I want to know the details on how DRV8320RS controls the dead time? 

I also need to know what other device configuration values can be altered by DRV8320RS? 

For example, What does the value below represent? Should it not be changed by the user? If it can be changed, what should that value be set to? I see that it is VDS_LEVEL = 1.300V, How do I know if this is correct value?

drvSPI8320Vars.Ctrl_Reg_05.VDS_LVL = DRV8320_VDS_LEVEL_1P300_V;