• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 82 subscribers
  • Views 412 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28388D: MCAN Interrupt Details

abhishek gota
Prodigy 231 points
Part Number: TMS320F28388D

Hi TI ,

MCAN_IE Register provides a list of interrupt enable options .

Can you provide me a link/description of all the events leading to the triggering of the following events ?

  • Bit Error Uncorrected Enable
  • Error Logging Overflow Enable
  • Error Passive Enable
  • Warning Status Enable
  • Bus_Off Status Enable
  • Timeout Occurred Enable
  • Timestamp Wraparound Enable

Thanks

Abhishek

  • 0
    TI__Guru* 95315 points

    Abhishek,

                  All these errors are described in the TRM in different sections.

     

    Bit Error Uncorrected Enable - See description for bit 21 of MCAN_IR register (page 4956 of SPRUII0C)

    Error Logging Overflow Enable - See description for bits 23-16 of MCAN_ECR register (page 4950 of SPRUII0C)

    Error Passive Enable - See description for bit 15 of MCAN_ECR register (page 4950 of SPRUII0C)

    Warning Status Enable - See description for bit 6 of MCAN_PSR register (page 4950 of SPRUII0C)

    Bus_Off Status Enable - See description for bit 7 of MCAN_PSR register (page 4950 of SPRUII0C)

    Timeout Occurred Enable - See section 45.5.3.1 & 45.5.11 and registers associated with the Timeout counter.

    Timestamp Wraparound Enable - See section 45.5.10