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TMS320F28335: EPWM lose one cycle when TBPHS change

Zhenjia Chen
Prodigy 140 points
Part Number: TMS320F28335


Hello!

My topology is Phase shift full bridge. I using the up count for EPWM3A/3B for leading leg and EPWM4A/4B for legging lag.

When I changed the TBPHS from 1459 to 15 , EPWM will lose one cycle.

My settings and waveform are shown below.

TBPRD=1500

CMPA=750

EPwm3Regs.DBRED = 60;

EPwm3Regs.DBFED = 60;

EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET; 
EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm3Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
EPwm3Regs.AQCTLB.bit.CAU = AQ_SET;

EPWM1 is Master

EPwm1Regs.TBCTL.bit.CTRMODE       = TB_COUNT_UP;

EPwm1Regs.TBCTL.bit.PHSEN             = TB_DISABLE;

EPwm1Regs.TBCTL.bit.PRDLD       = TB_SHADOW; 

EPwm1Regs.TBCTL.bit.SYNCOSEL    = TB_CTR_ZERO;

I know this problem is first cycle after this change, EPWM3 will not go to CTR = 0.

I have tried to change the period (I think TBPRD-1, or I’m wrong?), but this problem is not solved.

What is the best suggestion for solving this problem?

thanks

  • 0
    TI__Mastermind 42195 points

    Zhenjia,

    This occurs because the CMPx registers preform an "equal to" comparison, not a "greater than or equal to" comparison. This is understood and is intended.

    If you shift your PWM value  causing an event, in this case TBCTR =0, you will need to force the PWM output in software. Please look at the AQSFCR register if you are not using the Dead-band in complimentary mode, or if you are using a complementary mode please look at using the Trip-zone force.

    Regards,
    Cody