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TMS320F280049C: TMS320F28004x Real-Time Microcontrollers Technical Reference Manual: the TCR register

Jeongsoo Yoo
Expert 1025 points
Part Number: TMS320F280049C
Other Parts Discussed in Thread: C2000WARE

Hello,

I have a question on TMS320F28004x Real-Time Microcontrollers Technical Reference Manual; Literature number SPRUI33D.

Particularly it is on page 229.

The description of the bit 15 <TIF> field of the TCR register is as follows:

"TIF is not cleared automatically and does not need to be cleared to enable the next timer interrupt."

It seems that there is a type error in the above description.

I presume that it should be corrected as follows:

"TIF is cleared automatically and does not need to be cleared to enable the next timer interrupt."

I have come up with this conclusion with reference to the CCS project of timer_ex1_cputimers provided in the MotorControl_SDK.

There are three cpuTimerISRs in this CCS project; the cpuTimerISR() does not have any code that clears the TIF bit.

Therefore I suppose that the TIF bit is cleared automatically when entering the cpuTimerISR() function.

Please comment on my observation.

Thank you for your guidance in advance.

With regards,

JS Yoo

  • 0
    TI__Mastermind 21275 points

    Hi,

    Thanks for the note. I will assign this post to the correct owners to review the documentation and provide further comment. I would also recommend taking a look at the timer example provided in C2000Ware under the device support directory for a simplistic method to configure the cpuTimers. 

    Regards,

    Ozino

  • 0
    TI__Mastermind 25790 points

    Hi JS Yoo,

    The documentation is correct as it is. The TIF bit does not get cleared automatically, once the Timer decrements to 0 the TIF bit will get set and stay set until a 1 is written to the bit to clear it. 

    Are you seeing the TIF bit get cleared? 

    Best Regards,

    Marlyn

  • 0 in reply to Marlyn Rosales Castaneda20
    Expert 1025 points

    Hi Marlyn,

    Thank you for your review.

    If the TIF bit does not get cleared automatically, I suppose that the TIF bit may need to be cleared to enable the next timer interrupt.

    Then don't you think that the description of the bit 15 <TIF> field of the TCR register should be read as follows?

    "TIF is not cleared automatically and need to be cleared to enable the next timer interrupt."

    Thank you for your review.

    With regards,

    JS Yoo

  • +1 in reply to Jeongsoo Yoo
    TI__Mastermind 25790 points

    Hi JS Yoo,

    No, the TIF bit does not need to be cleared for the next timer interrupt. The purpose of the TIF bit is to indicate if the timer has decremented to 0 since the last time the TIF bit was cleared. 

    Best Regards,

    Marlyn