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TMS320F28377D: Memory assignment functions for the CPU2 CLA

Joel Holland
Intellectual 765 points
Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

Hi,

When initializing memory for the CLA1 in CPU1, the functions below can be called:

void CLA_configClaMemory(void)
{
// From F28377D reset no memory resources are allocated to CLA so it needs to be done here

EALLOW;

// Set CPU1 <=> CLA1 message RAMs

MemCfgRegs.MSGxINIT.bit.INIT_CLA1TOCPU = 1; // Initialise CLA1ToCPUMsgRAM
while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CLA1TOCPU != 1) {}; // Wait until done

MemCfgRegs.MSGxINIT.bit.INIT_CPUTOCLA1 = 1; // Initialise CPUToCLA1MsgRAM
while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CPUTOCLA1 != 1) {}; // Wait until done

// Set up program and data memory blocks for use by CLA1
MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1; // Allocate LS4 RAM to CLA1
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 1; // Set LS4 as program memory

MemCfgRegs.LSxMSEL.bit.MSEL_LS5 = 1; // Allocate LS5 RAM to CLA1
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 = 1; // Set LS5 as program memory

MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 1; // Allocate LS0 RAM to CLA1
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 0; // Set LS0 as data memory

MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 1; // Allocate LS1 RAM to CLA1
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS1 = 0; // Set LS1 as data memory

EDIS;
}

I have a few questions:

How can one do the exact same, but for the CLA that is in CPU2? I cannot find in the technical menu any functions which are used for CPU2 and CLA2. Are these functions able to be called within both CPU1 and CPU2 without issue?

Additionally, how do we know that the memory blocks we are setting up, are enough to account for the actual CLA program we will write, if the memory will include all variables and the actual code to be executed on the CLA?

Finally, what is the best way to trigger the CLA to begin execution on the CPU2? I initailize everything on CPU1, and generate INT1 and INT2 which originally trigger task1 and task2 of CLA1 - but I now want that second interrupt to trigger a task on a seperate CLA, contained in CPU2, and feed that information back to the CPU1, such that both tasks on each CLA can run in parallel and independent of each other. Is there a way to send the status of an interrupt from CPU1 to CPU2, or is there a better way to do this?


Regards,
Joel

  • +1
    TI__Expert 4610 points

    Joel,

    My answers below:

    "How can one do the exact same, but for the CLA that is in CPU2? I cannot find in the technical menu any functions which are used for CPU2 and CLA2. Are these functions able to be called within both CPU1 and CPU2 without issue?"

    -CPU2 has its own LS memories and hence CPU2 has to configure these memories using the MemCfg that is available from CPU2 side.You can refer to the cla_asin CPU02 project(function name CLA_configClaMemory) in the c2000ware which setups memories for CPU2.CLA

    "Additionally, how do we know that the memory blocks we are setting up, are enough to account for the actual CLA program we will write, if the memory will include all variables and the actual code to be executed on the CLA?"

    -Typically, you will get a linker error if the CLA program or data is not fitting into the allocated memory. If you are not getting any error, it means that the program/data has been able to fit successfully. 

    "Finally, what is the best way to trigger the CLA to begin execution on the CPU2? I initailize everything on CPU1, and generate INT1 and INT2 which originally trigger task1 and task2 of CLA1 - but I now want that second interrupt to trigger a task on a seperate CLA, contained in CPU2, and feed that information back to the CPU1, such that both tasks on each CLA can run in parallel and independent of each other. Is there a way to send the status of an interrupt from CPU1 to CPU2, or is there a better way to do this?"

    -If you want to initiate a CPU2.CLA task from CPU1, you can use IPC for triggering a CPU2 interrupt from CPU1 and inside the CPU2.IPC_ISR, you can trigger the CLA task

    Hope this clarifies all of your questions

    Regards,
    Praveen

  • 0 in reply to Praveen Kumar Ravichandran
    Intellectual 765 points

    Hi Praveen,

    This really does help, thank you. 

    With regards to the triggering of CPU2 CLA from CLA, is this method much more efficient than just giving CPU2 access to a GPIO pin, which when high, sets an interrupt through the input crossbar and into the CPU2 PIE? This seems like the most logical way to do it, but I will look into the use of IPC instead.

    Regards,
    Joel

  • 0 in reply to Joel Holland
    TI__Expert 4610 points

    Joel,

    Is the intent here to initiate the CPU2.CLA from CPU1? If so, when you allocate a particular GPIO to CPU2, CPU1 will not be able to set/clear that GPIO

    Regards,
    Praveen

  • 0 in reply to Praveen Kumar Ravichandran
    Intellectual 765 points

    Praveen,

    Yes, the idea is that I have two power converters that run in parallel. I want to launch converter 1 with CLA1 and converter 2 with CLA2. But I do all of the ADC sampling and almost everything else on CPU1 and planned to only use CPU2 to launch it's CLA and communicate the control effort back to CPU1, and then clear the interrupt. Would it matter if we cleared the interrupt from CPU1 or CPU2, as long as the GPIO pin was always visible to both?

    Any other ideas best to do this?

  • 0 in reply to Joel Holland
    TI__Expert 4610 points

    Joel,

    Yes, you can achieve what you want via input crossbar interrupt method, if you dont intend to access/control the GPIO from both the cores. The scheme you have suggested sounds the simplest for the usecase.

    Please take note to ACK the PIE channel from both the cores for the same interrupt since there is one PIE per core

    Regards,
    Praveen

  • 0 in reply to Praveen Kumar Ravichandran
    Intellectual 765 points

    Hi Praveen,

    Would it be more simplistic to just do a forceTaskandWait function call within an ISR on the second CPU to execute the CLA tasks?

    I feel like my first solution is more elegant, but they both achieve the required function.

  • +1 in reply to Joel Holland
    TI__Expert 4610 points

    Joel,

    Yes, that would work. I had suggested the same with the IPC scheme as well(inside the CPU2.IPC_ISR, you can trigger the CLA task)

    Regards,
    Praveen

  • 0 in reply to Praveen Kumar Ravichandran
    TI__Expert 4610 points

    Hi Joel,

    Hope the above answered your query, if so please close this thread by clicking "Verify answer"

    Regards,
    Praveen