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TMS320F28069: Questions about PIE flag handling

Yu Qi1
Prodigy 100 points

Part Number: TMS320F28069
Other Parts Discussed in Thread: C2000WARE

Hi, TI engineers. I have a question about the PIE interrupt flag. I have read about the interupts sources of C2000 is actually arranged into 12 groups and each group has about 8 interrupts. When the program runs into the interrupt's service routine, it has to clear the group interrupt flag so as to indicate that this interrupt has been serviced, like the code below

PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

My question is, since there may be situations that two different interrupts belongint to the same interrupt group come at the same time, will it cause any trouble when clear the group flag in the interrupt service routine. For example, EPWM1_INT and EPWM2_INT both belong to the same PIE group, which is group 3. When both interrupts come and the program run into interrrupt for EPWM1 and clears the group flag, will it cause the interrupt for EPWM2 not work anymore?

Thanks!

  • 0
    TI__Mastermind 19795 points

    Hi,

    Thanks for your question!

    To answer the question, you do not need to worry about the other interrupts in the group being ignored, they will simply wait for the other interrupt to complete!

    Here is why:

    The command "PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;" which is placed at the end of the ISR tells the PIE that we can now accept more interrupts from Group 1.

    If the PIEACK is not cleared, then that group will not service interrupts again (it will be waiting for the acknowledge bit to be cleared). So always make sure to call the PIEACK clear for the group at the end of each interrupt.

    So for the EPWM example you gave:

    Let's say all EPWM1 and EPWM2 both come in at the same time (both in group 3). EPWM1 gets serviced first since it has higher priority. At the end of EPWM1's ISR, PieCtrlRegs.PIEACK.all = PIEACK_GROUP3 gets called. This tells the group that we can now accept more interrupts.

    The ISR exits and the PIEIFR of EPWM2 is still set (the flag bit for this interrupt). So it travels through the PIEIER (enable bit is still set) of EPWM2, and finally travels through the PIEACK for the whole group (which we cleared in EPWM1's ISR). It then passes through the IER and ITM of the CPU interrupt handler, and then reaches the CPU.

    So the summarize: all the interrupts in a group can be serviced one-by-one, and using PIEACK does not cause pending interrupts to get lost.

    Regards,

    Vince

  • 0 in reply to Vince
    Prodigy 100 points

    Hi, Vince. Thanks for your reply and it really helps me to understand how does the PIE system work.

    I have another question. I have notced that in some of the interrupts, it is required to manually clear the interrupt flag for the peripherals while other is not. For example, in the interrupt for timer0, we only need to write the code below to clear the interrupt flag.

    PieCtrlRegs.PIEACK.all |= PIEACK_GROUP1;

    However, in interrupts like ECAP, SCI and etc, it is also required to clear other pheripheral's flag register apart from the PIE register. In SCI module, we need to some of the bits SCIFFRX to clear the interrupt flag and in ECAP module, we need to clear ECCLR. So my question is, is there any rule of this to let me know when I need to clear the flags of the peripherals and when I don't. Thanks you.

  • +1 in reply to Yu Qi1
    TI__Mastermind 19795 points

    Hi,

    Thanks for the follow up, glad to hear I was able to help!

    For you other question, unfortunately, there is no one-step way to tell whether a peripheral will need its interrupt cleared. The simplest (although not the most complete) way is to view the examples in C2000Ware, and see the example function for which bits get cleared.

    The most complete way to determine if a peripheral (like SCI, ECAP, etc.) needs to have its own interrupts cleared, is to check that chapter of the technical reference manual (linked here) and dig into the details of how the peripheral works (which I definitely understand can be a bit time-consuming, but is also necessary to truly understanding that peripheral).

    As a general rule:

    Every peripheral in the PIE will need to call PIEACK for its group.

    Most peripherals in the PIE will require their own interrupts to be cleared as well (like the bits in SCIFFRX).

    I hope that was able to help you, and thanks for your questions!

    Regards,

    Vince