Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: TMS320F28335, TMS320F28379D
Hi,
Many thanks for your support. We have been working with the TMS320F28335 on the exact same princple with a great success but we face difficulties to port it to the TMS320F28379D.
When using RTOS SYS/BIOS with the LaunchPad TMS320F28379D do you need to have the PieVectTable initialised as part of the init or does the RTOS SYS/BIOS makes the provision?
For some reason the Pie interrupts are not served and we would appricate your advise and recommandation,
Many thanks, -c-
- *.cfg ---
BIOS.addUserStartupFunction('&BiosStartFxn');
/* PIE Group 9, Interrupt 3, Vector Number 98 */
var interruptNum98 = 98;
var HWI_SCIRXBParams = new Hwi.Params();
HWI_SCIRXBParams.arg = interruptNum98;
HWI_SCIRXBParams.enableAck = true;
HWI_SCIRXBParams.maskSetting = Hwi.MaskingOption_BITMASK;
HWI_SCIRXBParams.disableMask = 0x0;
HWI_SCIRXBParams.restoreMask = 0x0;
HWI_SCIRXBParams.instance.name = "HWI_SCIRXB";
Program.global.HWI_SCIRXB = Hwi.create(interruptNum98, "&SCIB_RX_ISR", HWI_SCIRXBParams);
var VM_SwiParams = new Swi.Params();
VM_SwiParams.instance.name = "VM_Swi";
Program.global.VM_Swi = Swi.create("&VM_Fxn", VM_SwiParams);
-- Main.c --
int main(void)
{
Init_Ctrl_Sys(); // Initialise the CPU
Init_Ctrl_Pie(); // Initialise and enable the PIE
Init_Ctrl_Gpio(); // Initialise the shared GPIO pins
Init_Ctrl_Adc(); // Initialise the ADC Analog to Digital Converter
Init_Ctrl_Dac(); // Initialise the DAC Digital to Analog Converter
Init_Ctrl_Flash(); // Initialise the Flash
Init_Ctrl_Sci(); // Initialise the SCI Controller for Communication
BIOS_start();
return(0);
}
void BiosStartFxn(void)
{
Hwi_enablePIEIER(9,3); // Enable Interrupt Register 9.3 SCIB-RX, Vector Number 98
}
void VM_Fxn(void)
{
Ctrl_VirtualMenu();
}
-- DefaultIsrBioc.c --
interrupt void SCIB_RX_ISR(void)
{
PieCtrlRegs.PIEACK.all = PIEACK_GROUP9; // Must acknowledge the PIE group
Swi_post(VM_Swi); // post a SWI
}
-- VitualMenu.c --
void Ctrl_VirtualMenu(void)
{
Uint16 i;
n_NbrChar = ScibRegs.SCIFFRX.bit.RXFFST;
DINT; // Disable CPU interrupts
for(i=0;i<n_NbrChar;i++)
{
rdataA[i] = ScibRegs.SCIRXBUF.all; // Read data
}
n_Option = rdataA[0];
switch (n_Option)
{
case 150:
g_VIMU_bfSW.bit.ON = rdataA[1] & 0x0001;
break;
case 151:
g_VIMU_bfSW.bit.RUN = rdataA[1] & 0x0001;
break;
case 152:
g_VIMU_IQ_IqSupRef = (((rdataA[1] & 0x00FF) | (rdataA[2] << 8)) * 0.000244141);
break;
case 153:
g_VIMU_bfSW.bit.RESET = rdataA[1] & 0x0001;
break;
}
ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1; // Clear Overflow flag
ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1; // Clear Interrupt flag
EINT; // Enable CPU interrupts
}
