M-Boot ROM EMAC Boot Mode

Juvf Anisimov
Other Parts Discussed in Thread: CONTROLSUITE
I have F28M35xx ISO controlCard release 2.0. For example I took blinky_m3 (D:\soft\ti\controlSUITE\device_support\f28m35x\v207\F28M35x_examples_Master\blinky\m3). I attached *.cmd
MEMORY
{

    INTVECS (RWX)    : origin = 0x20005000, length = 0x01B0
    C0 (RWX)         : origin = 0x200061B0, length = 0x1E50
    C1 (RWX)         : origin = 0x20008000, length = 0x1000
    BOOT_RSVD (RX)   : origin = 0x20009000, length = 0x0900
    C2_1 (RWX)       : origin = 0x20009900, length = 0x0700
    RESETISR (RWX)   : origin = 0x2000A000, length = 0x0008
    C2_2 (RWX)       : origin = 0x2000A008, length = 0x0FF8
    C3 (RWX)         : origin = 0x2000B000, length = 0x2000
    CTOMRAM (RX)     : origin = 0x2007F000, length = 0x0800
    MTOCRAM (RWX)    : origin = 0x2007F800, length = 0x0800
	
	OTPSECLOCK       : origin = 0x00680800, length = 0x0004
    OTP_Reserved1    : origin = 0x00680804, length = 0x0004
    OTP_Reserved2    : origin = 0x00680808, length = 0x0004
    OTP_Z2_FLASH_START_ADDR             : origin = 0x0068080C, length = 0x0004
    OTP_EMACID       : origin = 0x00680810, length = 0x0008
    OTP_Reserved3    : origin = 0x00680818, length = 0x0004
    CUSTOMER_OTP_MAIN_OSC_CLK_FREQ      : origin = 0x0068081C, length = 0x0004
    OTP_Reserved4    : origin = 0x00680820, length = 0x0004
    OTP_BOOT_MODE_GPIO_CONFIGURE        : origin = 0x00680824, length = 0x0004
    OTP_Reserved5    : origin = 0x00680828, length = 0x0004
    OTP_ENTRY_POINT  : origin = 0x0068082C, length = 0x0004
    OTP_Reserved6    : origin = 0x00680830, length = 0x0010
}

/* Section allocation in memory */

SECTIONS
{
    .intvecs:   > INTVECS
    .resetisr:  > RESETISR
    .text   :   >> C0 | C1 | C2_1 | C2_2 | C3, crc_table(AppCrc, algorithm=CRC32_PRIME)
    .const  :   >> C0 | C1 | C2_1 | C2_2 | C3, crc_table(AppCrc, algorithm=CRC32_PRIME)
    .cinit  :   >  C0 | C1 | C2_1 | C2_2 | C3, crc_table(AppCrc, algorithm=CRC32_PRIME)
    .pinit  :   >> C0 | C1 | C2_1 | C2_2 | C3, crc_table(AppCrc, algorithm=CRC32_PRIME)

    .vtable :   >> C0 | C1 | C2_1 | C2_2 | C3
    .data   :   >> C2_1 | C2_2 | C3  
    .bss    :   >> C2_1 | C2_2 | C3  
    .sysmem :   >  C0 | C1 | C2_1 | C2_2 | C3
    .stack  :   >  C0 | C1 | C2_1 | C2_2 | C3

    .TI.crctab : > C2_2 | C3

#ifdef __TI_COMPILER_VERSION
   #if __TI_COMPILER_VERSION >= 15009000
    .TI.ramfunc : {} > C0 | C1
   #endif
#endif
}

After build i can see map-file

******************************************************************************
                  TI ARM Linker PC v5.2.5                      
******************************************************************************
>> Linked Thu May 05 10:00:59 2016

OUTPUT FILE NAME:   <blinky_m3.out>
ENTRY POINT SYMBOL: "_c_int00"  address: 200077cd


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
  OTPSECLOCK            00680800   00000004  00000000  00000004  RWIX
  OTP_Reserved1         00680804   00000004  00000000  00000004  RWIX
  OTP_Reserved2         00680808   00000004  00000000  00000004  RWIX
  OTP_Z2_FLASH_START_AD 0068080c   00000004  00000000  00000004  RWIX
  OTP_EMACID            00680810   00000008  00000000  00000008  RWIX
  OTP_Reserved3         00680818   00000004  00000000  00000004  RWIX
  CUSTOMER_OTP_MAIN_OSC 0068081c   00000004  00000000  00000004  RWIX
  OTP_Reserved4         00680820   00000004  00000000  00000004  RWIX
  OTP_BOOT_MODE_GPIO_CO 00680824   00000004  00000000  00000004  RWIX
  OTP_Reserved5         00680828   00000004  00000000  00000004  RWIX
  OTP_ENTRY_POINT       0068082c   00000004  00000000  00000004  RWIX
  OTP_Reserved6         00680830   00000010  00000000  00000010  RWIX
  INTVECS               20005000   000001b0  000001b0  00000000  RW X
  C0                    200061b0   00001e50  00001be8  00000268  RW X
  C1                    20008000   00001000  00000000  00001000  RW X
  BOOT_RSVD             20009000   00000900  00000000  00000900  R  X
  C2_1                  20009900   00000700  00000014  000006ec  RW X
  RESETISR              2000a000   00000008  00000006  00000002  RW X
  C2_2                  2000a008   00000ff8  00000050  00000fa8  RW X
  C3                    2000b000   00002000  00000000  00002000  RW X
  CTOMRAM               2007f000   00000800  00000000  00000800  R  X
  MTOCRAM               2007f800   00000800  00000000  00000800  RW X


SEGMENT ALLOCATION MAP

run origin  load origin   length   init length attrs members
----------  ----------- ---------- ----------- ----- -------
20005000    20005000    000001b0   000001b0    r--
  20005000    20005000    000001b0   000001b0    r-- .intvecs
200061b0    200061b0    0000185c   0000185c    r-x
  200061b0    200061b0    000016dc   000016dc    r-x .text
  20007890    20007890    0000017c   0000017c    r-- .const
20007a0c    20007a0c    00000100   00000000    rw-
  20007a0c    20007a0c    00000100   00000000    rw- .stack
20007b10    20007b10    00000038   00000038    r--
  20007b10    20007b10    00000038   00000038    r-- .cinit
20007c00    20007c00    00000258   00000000    rw-
  20007c00    20007c00    00000258   00000000    rw- .vtable
20009900    20009900    00000014   00000000    rw-
  20009900    20009900    00000014   00000000    rw- .data
2000a000    2000a000    00000058   00000058    r-x
  2000a000    2000a000    00000006   00000006    r-x .resetisr
  2000a008    2000a008    00000050   00000050    r-- .TI.crctab


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.intvecs   0    20005000    000001b0     
                  20005000    000001b0     startup_ccs.obj (.intvecs)

.stack     0    20007a0c    00000100     UNINITIALIZED
                  20007a0c    00000100     --HOLE--

.cinit     0    20007b10    00000038     
                  20007b10    00000011     (.cinit..data.load) [load image, compression = rle]
                  20007b21    00000003     --HOLE-- [fill = 0]
                  20007b24    0000000c     (__TI_handler_table)
                  20007b30    00000008     (.cinit..vtable.load) [load image, compression = zero_init]
                  20007b38    00000010     (__TI_cinit_table)

.resetisr 
*          0    2000a000    00000006     
                  2000a000    00000006     startup_ccs.obj (.resetisr:ResetISR)

.TI.crctab 
*          0    2000a008    00000050     
                  2000a008    00000050     (.TI.crctab:AppCrc)

.text      0    200061b0    000016dc     
                  200061b0    00000a58     driverlib.lib : sysctl.obj (.text)
                  20006c08    00000480                   : gpio.obj (.text)
                  20007088    000002d0                   : interrupt.obj (.text)
                  20007358    000000e4     blinky.obj (.text:main)
                  2000743c    000000ac     driverlib.lib : watchdog.obj (.text)
                  200074e8    0000009c     rtsv7M3_T_le_eabi.lib : memcpy_t2.obj (.text)
                  20007584    0000007a                           : memset_t2.obj (.text)
                  200075fe    00000002     startup_ccs.obj (.text:FaultISR)
                  20007600    0000006c     rtsv7M3_T_le_eabi.lib : autoinit.obj (.text)
                  2000766c    0000006a                           : copy_decompress_rle.obj (.text)
                  200076d6    00000002     startup_ccs.obj (.text:IntDefaultHandler)
                  200076d8    00000064     gpioInt.obj (.text:initIntGpio)
                  2000773c    0000004c     rtsv7M3_T_le_eabi.lib : cpy_tbl.obj (.text)
                  20007788    00000044                           : exit.obj (.text)
                  200077cc    0000003c                           : boot.obj (.text)
                  20007808    00000018                           : args_main.obj (.text)
                  20007820    00000014                           : _lock.obj (.text)
                  20007834    00000010     gpioInt.obj (.text:portCIntHandler)
                  20007844    0000000e     rtsv7M3_T_le_eabi.lib : copy_decompress_none.obj (.text:decompress:none)
                  20007852    0000000c     driverlib.lib : cpu.obj (.text:CPUcpsid)
                  2000785e    0000000c                   : cpu.obj (.text:CPUcpsie)
                  2000786a    0000000c     rtsv7M3_T_le_eabi.lib : copy_zero_init.obj (.text:decompress:ZI)
                  20007876    00000002     startup_ccs.obj (.text:NmiSR)
                  20007878    00000006     driverlib.lib : sysctl.obj (.text:SysCtlDelay)
                  2000787e    00000006     rtsv7M3_T_le_eabi.lib : copy_decompress_rle.obj (.text:decompress:rle24)
                  20007884    00000004     driverlib.lib : cpu.obj (.text:CPUwfi)
                  20007888    00000004     rtsv7M3_T_le_eabi.lib : pre_init.obj (.text)

.const     0    20007890    0000017c     
                  20007890    00000088     driverlib.lib : gpio.obj (.const:g_pulGPIOBaseAddrs)
                  20007918    00000070                   : interrupt.obj (.const:g_pulRegs)
                  20007988    00000064                   : sysctl.obj (.const)
                  200079ec    00000020                   : interrupt.obj (.const)

.vtable    0    20007c00    00000258     UNINITIALIZED
                  20007c00    00000258     driverlib.lib : interrupt.obj (.vtable)

.data      0    20009900    00000014     UNINITIALIZED
                  20009900    00000008     rtsv7M3_T_le_eabi.lib : _lock.obj (.data)
                  20009908    00000008                           : exit.obj (.data)
                  20009910    00000004                           : stkdepth_vars.obj (.data)


LINKER GENERATED COPY TABLES

__TI_cinit_table @ 20007b38 records: 2, size/record: 8, table size: 16
    .data: load addr=20007b10, load size=00000011 bytes, run addr=20009900, run size=00000014 bytes, compression=rle
    .vtable: load addr=20007b30, load size=00000008 bytes, run addr=20007c00, run size=00000258 bytes, compression=zero_init


LINKER GENERATED HANDLER TABLE

__TI_handler_table @ 20007b24 records: 3, size/record: 4, table size: 12
    index: 0, handler: __TI_zero_init
    index: 1, handler: __TI_decompress_rle24
    index: 2, handler: __TI_decompress_none

I create *.bin with Post-buils steps "${CCS_INSTALL_ROOT}/utils/tiobj2bin/tiobj2bin.bat" "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin" "${CG_TOOL_ROOT}/bin/armofd.exe" "${CG_TOOL_ROOT}/bin/armhex.exe" "${CCS_INSTALL_ROOT}/utils/tiobj2bin/mkhex4bin.exe"

I debug my programm (load *.out  to RAM and run) - it works.

I load *.bin to MCU with  LM Flash Programmer by Ethernet. I can see loading with Wireshark. After loading my programm doesn't work. Why? 

Do you have  example, where using the Ethernet interface to communicate with the bootloader?
over 9 years ago
0 Santosh Athuru over 9 years ago
TI__Mastermind 19810 points
Anisimov,

the linker command file has to be adjusted for the application to be EMAC boot-able.

the Entrypoint of your app (RESETISR) should be mapped to 0x20005000. The EMAC loader on F28M35x can only load from 0x20005000 to end of shared RAM address. We basically allow load into continuous RAM memory. At the end of load the boot ROM branches to 0x20005000 when in EMAC Boot, so your entry point should be linked to that location.

Once the application code is loaded it can however re-purpose the other RAM onto which the EMAC boot didn't load.

Hope this helps.

Best Regards
Santosh Athuru
C2000™︎ microcontrollers

C2000 microcontrollers forum

M-Boot ROM EMAC Boot Mode
