Hi Guys,
MCU : TMS320F28075
CCS 6.2.0.00050
I have initialised some global variables in my own .c file as follows:
int16 array_index = 0, array_modulo = 0, array_num = 0, tempI = 0, array_index_cla = 0, array_modulo_cla = 0, array_num_cla = 0, tempI_cla = 0;
All these are global variables, so I should be able to update them in watchwindow. But I cannot edit the values which has @Program in the Address column. However, the other values which has @Data is the Adress Column can be edited.
Also I get this error message:
IcePick_C_0: Trouble Reading Memory Block at 0x0 on Page 0 of Length 0xc8
Please let me know how to resolve this issue.
I recently modified my cmd file to make space for CLA Program and I don't know if that might have caused this problem. So I have attached my cmd file also.
// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifndef CLA_C
#error CLA_C must be predefined in C2000 Linker!
#endif
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x080000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x002000
// RAMLS3 : origin = 0x009800, length = 0x000800
// RAMLS4 : origin = 0x00A000, length = 0x000800
// RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x008000 /* on-chip Flash */
FLASHC : origin = 0x08A000, length = 0x006000 /* on-chip Flash */
FLASHD : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHE : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
FLASHI : origin = 0x0B8000, length = 0x008000 /* on-chip Flash */
RAMGS0 : origin = 0x00C000, length = 0x003000
RAMGS1 : origin = 0x00F000, length = 0x001000
RAMGS2 : origin = 0x010000, length = 0x001000
RAMGS3 : origin = 0x011000, length = 0x001000
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
}
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHB PAGE = 0, ALIGN(4)
.pinit : > FLASHB, PAGE = 0, ALIGN(4)
.text : > FLASHB PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)
// ramfuncs : LOAD = FLASHD,
// RUN = RAMLS4,
// LOAD_START(_RamfuncsLoadStart),
// LOAD_SIZE(_RamfuncsLoadSize),
// LOAD_END(_RamfuncsLoadEnd),
// RUN_START(_RamfuncsRunStart),
// RUN_SIZE(_RamfuncsRunSize),
// RUN_END(_RamfuncsRunEnd),
// PAGE = 0, ALIGN(4)
/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : > RAMGS0 PAGE = 1
.esysmem : > RAMGS1 PAGE = 1
/* Initalized sections go in Flash */
.econst : > FLASHB PAGE = 0, ALIGN(4)
.switch : > FLASHB PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
// Filter_RegsFile : > RAMGS0, PAGE = 1
/* CLA specific sections */
Cla1Prog : LOAD = FLASHG,
RUN = RAMLS2,
LOAD_START(_Cla1funcsLoadStart),
LOAD_END(_Cla1funcsLoadEnd),
RUN_START(_Cla1funcsRunStart),
LOAD_SIZE(_Cla1funcsLoadSize),
PAGE = 0, ALIGN(4)
//
// The address "0x01001870" is taken from TRM - 3.22.1.2. It tells the linker that the math tables
// are located at this address in ROM, and its a NOLOAD section i.e. don't do anything at load time.
// F28075 has an inbuild ROM that has ClaMathTables and so we are using the ROM variant of CLAMATH Library.
// This saves some RAM space.
//
// CLA1mathTables :> 0x01001870, PAGE=0, TYPE = NOLOAD
//
// The CLA data rom is dual mapped, the above mentioned address is the c28x side address - We should actually use the
// CLA mapping of the space when we define the section in the linker command file, so
//
CLA1mathTables :> 0x000F870, PAGE=1, TYPE = DSECT
//
// Use the following definition only when you are not using the ROM variant of CLAMATH Library
//
/* CLA1mathTables : LOAD = FLASHE,
RUN = RAMLS0,
RUN_START(_CLA1mathTablesRunStart),
LOAD_START(_CLA1mathTablesLoadStart),
LOAD_SIZE(_CLA1mathTablesLoadSize),
PAGE = 0, ALIGN(4)
*/
// CLADataLS0 : > RAMLS1, PAGE=1
// CLADataLS1 : > RAMLS2, PAGE=1
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHC,
RUN = RAMGS6,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#endif
#endif
/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS3, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS3, PAGE = 1, fill=0x2222
#ifdef CLA_C
/* CLA C compiler sections */
//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > RAMLS0, PAGE = 1
.scratchpad : > RAMLS1, PAGE = 1
.bss_cla : > RAMLS1, PAGE = 1
.const_cla : LOAD = FLASHF,
RUN = RAMLS1,
RUN_START(_Cla1ConstRunStart),
LOAD_START(_Cla1ConstLoadStart),
LOAD_SIZE(_Cla1ConstLoadSize),
PAGE = 1
#endif //CLA_C
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
